From: Stephen Boyd <swboyd@chromium.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-msm@vger.kernel.org, Timur Tabi <timur@codeaurora.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Grant Likely <grant.likely@secretlab.ca>,
linux-gpio@vger.kernel.org,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v4 1/5] dt-bindings: gpio: Add a gpio-reserved-ranges property
Date: Fri, 23 Mar 2018 09:34:49 -0700 [thread overview]
Message-ID: <20180323163453.96495-2-swboyd@chromium.org> (raw)
In-Reply-To: <20180323163453.96495-1-swboyd@chromium.org>
From: Stephen Boyd <sboyd@codeaurora.org>
Some qcom platforms make some GPIOs or pins unavailable for use
by non-secure operating systems, and thus reading or writing the
registers for those pins will cause access control issues.
Introduce a DT property to describe the set of GPIOs that are
available for use so that higher level OSes are able to know what
pins to avoid reading/writing.
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---
Documentation/devicetree/bindings/gpio/gpio.txt | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index b5de08e3b1a2..a7c31de29362 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -151,9 +151,9 @@ in a lot of designs, some using all 32 bits, some using 18 and some using
first 18 GPIOs, at local offset 0 .. 17, are in use.
If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an
-additional bitmask is needed to specify which GPIOs are actually in use,
-and which are dummies. The bindings for this case has not yet been
-specified, but should be specified if/when such hardware appears.
+additional set of tuples is needed to specify which GPIOs are unusable, with
+the gpio-reserved-ranges binding. This property indicates the start and size
+of the GPIOs that can't be used.
Optionally, a GPIO controller may have a "gpio-line-names" property. This is
an array of strings defining the names of the GPIO lines going out of the
@@ -178,6 +178,7 @@ gpio-controller@00000000 {
gpio-controller;
#gpio-cells = <2>;
ngpios = <18>;
+ gpio-reserved-ranges = <0 4>, <12 2>;
gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
"LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
"Row A", "Row B", "Row C", "Row D", "NMI button",
--
Sent by a computer through tubes
next prev parent reply other threads:[~2018-03-23 16:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-23 16:34 [PATCH v4 0/5] Support qcom pinctrl protected pins Stephen Boyd
2018-03-23 16:34 ` Stephen Boyd [this message]
2018-03-26 22:25 ` [PATCH v4 1/5] dt-bindings: gpio: Add a gpio-reserved-ranges property Rob Herring
2018-03-23 16:34 ` [PATCH v4 2/5] gpiolib: Extract mask allocation into subroutine Stephen Boyd
2018-03-23 16:34 ` [PATCH v4 3/5] gpiolib: Change bitmap allocation to kmalloc_array Stephen Boyd
2018-03-23 16:34 ` [PATCH v4 4/5] gpiolib: Support 'gpio-reserved-ranges' property Stephen Boyd
2018-03-23 16:34 ` [PATCH v4 5/5] pinctrl: qcom: Don't allow protected pins to be requested Stephen Boyd
2018-03-23 23:50 ` [PATCH v4 0/5] Support qcom pinctrl protected pins Timur Tabi
2018-03-26 8:39 ` Andy Shevchenko
2018-03-27 13:35 ` Linus Walleij
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