From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?TXlsw6huZQ==?= Josserand Subject: Re: [PATCH v6 05/11] ARM: smp: Add initialization of CNTVOFF Date: Wed, 18 Apr 2018 12:01:54 +0200 Message-ID: <20180418120154.28fe6c4c@dell-desktop.home> References: <20180416215032.5023-1-mylene.josserand@bootlin.com> <20180416215032.5023-6-mylene.josserand@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Geert Uytterhoeven Cc: Russell King , Maxime Ripard , Chen-Yu Tsai , Marc Zyngier , Mark Rutland , Rob Herring , Simon Horman , Magnus Damm , Linux-Renesas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LABBE Corentin , quentin.schulz@bootlin.com, Thomas Petazzoni , Linux ARM , Linux Kernel Mailing List List-Id: devicetree@vger.kernel.org Hello Geert, On Wed, 18 Apr 2018 11:30:47 +0200 Geert Uytterhoeven wrote: > Allo Mylène, > > On Mon, Apr 16, 2018 at 11:50 PM, Mylène Josserand > wrote: > > The CNTVOFF register from arch timer is uninitialized. > > It should be done by the bootloader but it is currently not the case, > > even for boot CPU because this SoC is booting in secure mode. > > It leads to an random offset value meaning that each CPU will have a > > different time, which isn't working very well. > > > > Add assembly code used for boot CPU and secondary CPU cores to make > > sure that the CNTVOFF register is initialized. Because this code can > > be used by different platforms, add this assembly file in ARM's common > > folder. > > Thanks for your patch! > > > Signed-off-by: Mylène Josserand > > Reviewed-by: Geert Uytterhoeven > Tested-by: Geert Uytterhoeven > > Gr{oetje,eeting}s, > > Geert > Great, thank you very much for your test! Best regards, -- Mylène Josserand, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering http://bootlin.com