From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Kocialkowski Subject: [PATCH v2 09/10] ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes Date: Thu, 19 Apr 2018 17:45:35 +0200 Message-ID: <20180419154536.17846-5-paul.kocialkowski@bootlin.com> References: <20180419154124.17512-1-paul.kocialkowski@bootlin.com> Reply-To: paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20180419154124.17512-1-paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Pawel Osciak , Marek Szyprowski , Kyungmin Park , Hans Verkuil , Sakari Ailus , Philipp Zabel , Arnd Bergmann , Alexandre Courbot , Tomasz Figa , Paul Kocialkowski List-Id: devicetree@vger.kernel.org This adds nodes for the Video Engine and the associated reserved memory for the Allwinner A20. Up to 96 MiB of memory are dedicated to the VPU. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun7i-a20.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index bd0cd3204273..cb6d82065dcf 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -163,6 +163,20 @@ reg = <0x40000000 0x80000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ + ve_memory: cma@4a000000 { + compatible = "shared-dma-pool"; + reg = <0x4a000000 0x6000000>; + no-map; + linux,cma-default; + }; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -451,6 +465,23 @@ }; }; + ve: video-engine@1c0e000 { + compatible = "allwinner,sun4i-a10-video-engine"; + reg = <0x01c0e000 0x1000>; + memory-region = <&ve_memory>; + + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + + assigned-clocks = <&ccu CLK_VE>; + assigned-clock-rates = <320000000>; + + resets = <&ccu RST_VE>; + + interrupts = ; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; -- 2.16.3