From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sebastian Reichel Subject: Re: [PATCH v5 6/6] reset: Renesas RZ/N1 reboot driver Date: Wed, 25 Apr 2018 23:37:32 +0200 Message-ID: <20180425213732.tdmla3kdeuc2jjke@earth.universe> References: <1523963101-56725-1-git-send-email-michel.pollet@bp.renesas.com> <1523963101-56725-7-git-send-email-michel.pollet@bp.renesas.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="pm7n5n2in6lw4rqw" Return-path: Content-Disposition: inline In-Reply-To: <1523963101-56725-7-git-send-email-michel.pollet@bp.renesas.com> Sender: linux-kernel-owner@vger.kernel.org To: Michel Pollet Cc: linux-renesas-soc@vger.kernel.org, Simon Horman , phil.edworthy@renesas.com, Michel Pollet , Magnus Damm , Rob Herring , Mark Rutland , Russell King , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org List-Id: devicetree@vger.kernel.org --pm7n5n2in6lw4rqw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Tue, Apr 17, 2018 at 12:04:21PM +0100, Michel Pollet wrote: > The Renesas RZ/N1 Family (Part #R9A06G0xx) needs a small driver > to reboot the Cortex-A7 cores. This driver is a sub driver of > the sysctrl MFD. >=20 > Signed-off-by: Michel Pollet > --- > drivers/power/reset/Kconfig | 7 +++ > drivers/power/reset/Makefile | 1 + > drivers/power/reset/rzn1-reboot.c | 96 +++++++++++++++++++++++++++++++++= ++++++ > 3 files changed, 104 insertions(+) > create mode 100644 drivers/power/reset/rzn1-reboot.c >=20 > diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig > index df58fc8..1416d88 100644 > --- a/drivers/power/reset/Kconfig > +++ b/drivers/power/reset/Kconfig > @@ -144,6 +144,13 @@ config POWER_RESET_RESTART > Instead they restart, and u-boot holds the SoC until the > user presses a key. u-boot then boots into Linux. > =20 > +config POWER_RESET_RZN1 > + bool "Renesas RZ/N1 reboot driver" > + depends on ARCH_RZN1 > + help > + This driver allows rebooting the CA7 cores of the > + Renesas RZ/N1 Family of SoC (Part # R9A06G0xx). > + > config POWER_RESET_ST > bool "ST restart driver" > depends on ARCH_STI > diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile > index 7778c74..bad9702 100644 > --- a/drivers/power/reset/Makefile > +++ b/drivers/power/reset/Makefile > @@ -16,6 +16,7 @@ obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) +=3D piix4-pow= eroff.o > obj-$(CONFIG_POWER_RESET_LTC2952) +=3D ltc2952-poweroff.o > obj-$(CONFIG_POWER_RESET_QNAP) +=3D qnap-poweroff.o > obj-$(CONFIG_POWER_RESET_RESTART) +=3D restart-poweroff.o > +obj-$(CONFIG_POWER_RESET_RZN1) +=3D rzn1-reboot.o > obj-$(CONFIG_POWER_RESET_ST) +=3D st-poweroff.o > obj-$(CONFIG_POWER_RESET_VERSATILE) +=3D arm-versatile-reboot.o > obj-$(CONFIG_POWER_RESET_VEXPRESS) +=3D vexpress-poweroff.o > diff --git a/drivers/power/reset/rzn1-reboot.c b/drivers/power/reset/rzn1= -reboot.c > new file mode 100644 > index 0000000..43876d5 > --- /dev/null > +++ b/drivers/power/reset/rzn1-reboot.c > @@ -0,0 +1,96 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * RZ/N1 reboot driver > + * > + * Copyright (C) 2018 Renesas Electronics Europe Limited > + * > + * Michel Pollet , > + * Derived from zx-reboot.c > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +/* Definitions from the SDK rzn1-sysctrl.h autogenerated file */ > +#define RZN1_SYSCTRL_REG_RSTEN_MRESET_EN 0 > +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN 1 > +#define RZN1_SYSCTRL_REG_RSTEN_WDA7RST_EN_MASK 0x6 > +#define RZN1_SYSCTRL_REG_RSTEN_WDM3RST_EN 3 > +#define RZN1_SYSCTRL_REG_RSTEN_CM3LOCKUPRST_EN 4 > +#define RZN1_SYSCTRL_REG_RSTEN_CM3SYSRESET_EN 5 > +#define RZN1_SYSCTRL_REG_RSTEN_SWRST_EN 6 > +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ 1 > +#define RZN1_SYSCTRL_REG_RSTCTRL_WDA7RST_REQ_MASK 0x6 > +#define RZN1_SYSCTRL_REG_RSTCTRL_WDM3RST_REQ 3 > +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3LOCKUPRST_REQ 4 > +#define RZN1_SYSCTRL_REG_RSTCTRL_CM3SYSRESET_REQ 5 > +#define RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ 6 > + > +static void __iomem *reg_rsten, *reg_rstctrl; Please make this into a proper driver and allocate this dynamically. You can get device context from the notifier_block, see for example gpio-restart. > +static int rzn1_reboot_handler(struct notifier_block *this, > + unsigned long mode, void *cmd) > +{ > + writel(readl(reg_rsten) | > + BIT(RZN1_SYSCTRL_REG_RSTEN_SWRST_EN) | > + BIT(RZN1_SYSCTRL_REG_RSTEN_MRESET_EN), > + reg_rsten); > + writel(readl(reg_rstctrl) | > + BIT(RZN1_SYSCTRL_REG_RSTCTRL_SWRST_REQ), > + reg_rstctrl); > + > + mdelay(50); > + pr_emerg("Unable to restart system\n"); > + > + return NOTIFY_DONE; > +} > + > +static struct notifier_block rzn1_reboot_nb =3D { > + .notifier_call =3D rzn1_reboot_handler, > + .priority =3D 128, > +}; > + > +static int rzn1_reboot_probe(struct platform_device *ofdev) > +{ > + int err; > + > + reg_rsten =3D of_iomap(ofdev->dev.of_node, 0); > + reg_rstctrl =3D of_iomap(ofdev->dev.of_node, 1); Please use devm_ioremap(). > + > + if (!reg_rsten || !reg_rstctrl) { > + dev_err(&ofdev->dev, "invalid register mapping\n"); > + return -ENODEV; > + } > + > + err =3D register_restart_handler(&rzn1_reboot_nb); > + if (err) { > + dev_err(&ofdev->dev, "register restart handler failed(err=3D%d)\n", > + err); > + } Missing unregister_restart_handler() in .remove. > + > + return err; > +} > + > +static const struct of_device_id rzn1_reboot_of_match[] =3D { > + { .compatible =3D "renesas,rzn1-reboot" }, > + {} > +}; > +MODULE_DEVICE_TABLE(of, rzn1_reboot_of_match); > + > +static struct platform_driver rzn1_reboot_driver =3D { > + .probe =3D rzn1_reboot_probe, > + .driver =3D { > + .name =3D "rzn1-reboot", > + .of_match_table =3D rzn1_reboot_of_match, > + }, > +}; > +module_platform_driver(rzn1_reboot_driver); > + > +MODULE_DESCRIPTION("RZ/N1 reboot driver"); > +MODULE_AUTHOR("Michel Pollet , "); > +MODULE_LICENSE("GPL v2"); -- Sebastian --pm7n5n2in6lw4rqw Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAlrg9RkACgkQ2O7X88g7 +pr3Lw//f5XmJJbaxZVTpTWDcSS8e5a75/up/yHkX7UFtrMosx3wF0XxelTr4Q+X 1EnJouQntKq+f7/DZ8IoATbR26LyAp60dwMtD4gaH63kyG13jYQEOTA2Dl+H/Z+A +c7xjh6JwQhNQZfvftx7XoJrJF2Ht0SpIVjPqORVn/zo8G9keLL1Cs0E5ZQbinhX 9zbO6hdcqXmGyhyEKpi5VUz9y2tHtagP2rLGqRH4beIHarKupvt5rZ2bMKlqUKvs ehWPUGP1DBb3jJ8+V7WiXcnfBuqG6+kfV8/u9kO560b6kBKMEeMIy6Ct6/VLYvvW YmpoNNX9zSsADgPt1m7Qk1seF6JnogDrShTRxD54m/EGC29eLBSGqygm66jRJHC4 xf83+DC8k23Hx8MaM0zQkfNy7BYEapKYdE4mBdIIJKAMzS9EObIfdxl6pivVElm8 K6ngd000ZYi7dX8fDQeiI78v9drdFRrR693DmqrlFuzRfMvbLzVzTcDmA+gt8z12 KfDXDiHDbl+nhR1YG828UfFWGEX/uzHfVYLJxvAj2UjY4ApPTiEPPIpMGp9OsTg7 3LFWjXP4PVJGdEyE/8ehqWFjsfPBf5k7CPtBobXWpTCXA2iR3WxLgt1Ae/99BxqA qkQbWeUeRd6ZIv9AqTyRFtIdD5Rjh0tJ3bcNLLpM1ZbuBEbFU/s= =NPtG -----END PGP SIGNATURE----- --pm7n5n2in6lw4rqw--