[PATCH v4 0/3] Add suppport for sn65dsi86 bridge chip and Innolux 2k edp panel

[PATCH v4 0/3] Add suppport for sn65dsi86 bridge chip and Innolux 2k edp panel

[Sandeep Panda]

Changes in current patchset:
 - Reuse simple panel driver for the 2k eDP display panel.
 - Update bridge chip enable/disable sequence.
 - Update bridge chip dt-bindings.
 - Add Kconfig and Makefile to bridge driver change.

Sandeep Panda (3):
  drm/bridge: add support for sn65dsi86 bridge driver
  dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
  drm/panel: add support for Innolux TV123WAM panel

 .../bindings/display/bridge/ti,sn65dsi86.txt       |  76 +++
 .../bindings/display/panel/innolux,tv123wam.txt    |   7 +
 drivers/gpu/drm/bridge/Kconfig                     |   9 +
 drivers/gpu/drm/bridge/Makefile                    |   1 +
 drivers/gpu/drm/bridge/ti-sn65dsi86.c              | 721 +++++++++++++++++++++
 drivers/gpu/drm/panel/panel-simple.c               |  27 +
 6 files changed, 841 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
 create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
 create mode 100644 drivers/gpu/drm/bridge/ti-sn65dsi86.c

-- 
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a Linux Foundation Collaborative Project

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[PATCH v4 1/3] drm/bridge: add support for sn65dsi86 bridge driver

[Sandeep Panda]

Add support for TI's sn65dsi86 dsi2edp bridge chip.
The chip converts DSI transmitted signal to eDP signal,
which is fed to the connected eDP panel.

This chip can be controlled via either i2c interface or
dsi interface. Currently in driver all the control registers
are being accessed through i2c interface only.
Also as of now HPD support has not been added to bridge
chip driver.

Changes in v1:
 - Split the dt-bindings and the driver support into separate patches
   (Andrzej Hajda).
 - Use of gpiod APIs to parse and configure gpios instead of obsolete ones
   (Andrzej Hajda).
 - Use macros to define the register offsets (Andrzej Hajda).

Changes in v2:
 - Separate out edp panel specific HW resource handling from bridge
   driver and create a separate edp panel drivers to handle panel
   specific mode information and HW resources (Sean Paul).
 - Replace pr_* APIs to DRM_* APIs to log error or debug information
   (Sean Paul).
 - Remove some of the unnecessary structure/variable from driver (Sean
   Paul).
 - Rename the function and structure prefix "sn65dsi86" to "ti_sn_bridge"
   (Sean Paul / Rob Herring).
 - Remove most of the hard-coding and modified the bridge init sequence
   based on current mode (Sean Paul).
 - Remove the existing function to retrieve the EDID data and
   implemented this as an i2c_adapter and use drm_get_edid() (Sean Paul).
 - Remove the dummy irq handler implementation, will add back the
   proper irq handling later (Sean Paul).
 - Capture the required enable gpios in a single array based on dt entry
   instead of having individual descriptor for each gpio (Sean Paul).

Changes in v3:
 - Remove usage of irq_gpio and replace it as "interrupts" property (Rob
   Herring).
 - Remove the unnecessary header file inclusions (Sean Paul).
 - Rearrange the header files in alphabetical order (Sean Paul).
 - Use regmap interface to perform i2c transactions.
 - Update Copyright/License field and address other review comments
   (Jordan Crouse).

Changes in v4:
 - Update License/Copyright (Sean Paul).
 - Add Kconfig and Makefile changes (Sean Paul).
 - Drop i2c gpio handling from this bridge driver, since i2c sda/scl gpios
   will be handled by i2c master.
 - Remove unnecessary goto statements (Sean Paul).
 - Add mutex lock to power_ctrl API to avoid race conditions (Sean
   Paul).
 - Add support to parse reference clk frequency from dt(optional).
 - Update the bridge chip enable/disable sequence.

Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
---
 drivers/gpu/drm/bridge/Kconfig        |   9 +
 drivers/gpu/drm/bridge/Makefile       |   1 +
 drivers/gpu/drm/bridge/ti-sn65dsi86.c | 721 ++++++++++++++++++++++++++++++++++
 3 files changed, 731 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/ti-sn65dsi86.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 3b99d5a..8153150 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -108,6 +108,15 @@ config DRM_TI_TFP410
 	---help---
 	  Texas Instruments TFP410 DVI/HDMI Transmitter driver
 
+config DRM_TI_SN65DSI86
+	tristate "TI SN65DSI86 DSI to eDP bridge"
+	depends on OF
+	select DRM_KMS_HELPER
+	select REGMAP_I2C
+	select DRM_PANEL
+	---help---
+	  Texas Instruments SN65DSI86 DSI to eDP Bridge driver
+
 source "drivers/gpu/drm/bridge/analogix/Kconfig"
 
 source "drivers/gpu/drm/bridge/adv7511/Kconfig"
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 373eb28..3711be8 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
 obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
 obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
 obj-$(CONFIG_DRM_TI_TFP410) += ti-tfp410.o
+obj-$(CONFIG_DRM_TI_SN65DSI86) += ti-sn65dsi86.o
 obj-y += synopsys/
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
new file mode 100644
index 0000000..28a4be8
--- /dev/null
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -0,0 +1,721 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ */
+
+#include <drm/drmP.h>
+#include <drm/drm_atomic.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/of_gpio.h>
+#include <linux/of_graph.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#define SN_BRIDGE_REVISION_ID 0x2
+
+/* Link Training specific registers */
+#define SN_DEVICE_REV_REG			0x08
+#define SN_REFCLK_FREQ_REG			0x0A
+#define SN_DSI_LANES_REG			0x10
+#define SN_DSIA_CLK_FREQ_REG			0x12
+#define SN_ENH_FRAME_REG			0x5A
+#define SN_SSC_CONFIG_REG			0x93
+#define SN_DATARATE_CONFIG_REG			0x94
+#define SN_PLL_ENABLE_REG			0x0D
+#define SN_SCRAMBLE_CONFIG_REG			0x95
+#define SN_AUX_WDATA0_REG			0x64
+#define SN_AUX_ADDR_19_16_REG			0x74
+#define SN_AUX_ADDR_15_8_REG			0x75
+#define SN_AUX_ADDR_7_0_REG			0x76
+#define SN_AUX_LENGTH_REG			0x77
+#define SN_AUX_CMD_REG				0x78
+#define SN_ML_TX_MODE_REG			0x96
+/* video config specific registers */
+#define SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG	0x20
+#define SN_CHA_ACTIVE_LINE_LENGTH_HIGH_REG	0x21
+#define SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG	0x24
+#define SN_CHA_VERTICAL_DISPLAY_SIZE_HIGH_REG	0x25
+#define SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG	0x2C
+#define SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG	0x2D
+#define SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG	0x30
+#define SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG	0x31
+#define SN_CHA_HORIZONTAL_BACK_PORCH_REG	0x34
+#define SN_CHA_VERTICAL_BACK_PORCH_REG		0x36
+#define SN_CHA_HORIZONTAL_FRONT_PORCH_REG	0x38
+#define SN_CHA_VERTICAL_FRONT_PORCH_REG		0x3A
+#define SN_DATA_FORMAT_REG			0x5B
+
+#define MIN_DSI_CLK_FREQ_MHZ	40
+#define SN_DEFAULT_REF_CLK_KHZ	19200
+
+/* fudge factor required to account for 8b/10b encoding */
+#define DP_CLK_FUDGE_NUM	10
+#define DP_CLK_FUDGE_DEN	8
+
+#define DPPLL_CLK_SRC_REFCLK	0
+#define DPPLL_CLK_SRC_DSICLK	1
+
+#define SN_DSIA_REFCLK_OFFSET	1
+#define SN_DSIA_LANE_OFFSET	3
+#define SN_DP_LANE_OFFSET	4
+#define SN_DP_DATA_RATE_OFFSET	5
+#define SN_TIMING_HIGH_OFFSET	8
+
+#define SN_ENABLE_VID_STREAM_BIT	BIT(3)
+#define SN_DSIA_NUM_LANES_BITS		(BIT(4) | BIT(3))
+#define SN_DP_NUM_LANES_BITS		(BIT(5) | BIT(4))
+#define SN_DP_DATA_RATE_BITS		(BIT(7) | BIT(6) | BIT(5))
+
+struct ti_sn_bridge {
+	struct device *dev;
+	struct regmap *regmap;
+	struct drm_bridge bridge;
+	struct drm_connector connector;
+	struct device_node *host_node;
+	struct mipi_dsi_device *dsi;
+	unsigned int refclk_khz;
+	struct drm_panel *panel;
+	struct gpio_desc *enable_gpio;
+	unsigned int num_supplies;
+	struct regulator_bulk_data *supplies;
+	struct i2c_adapter *ddc;
+	unsigned int num_modes;
+	struct drm_display_mode curr_mode;
+	struct mutex lock;
+	unsigned int ctrl_ref_count;
+};
+
+static const struct regmap_range ti_sn_bridge_volatile_ranges[] = {
+	{ .range_min = 0, .range_max = 0xff },
+};
+
+static const struct regmap_access_table ti_sn_bridge_volatile_table = {
+	.yes_ranges = ti_sn_bridge_volatile_ranges,
+	.n_yes_ranges = ARRAY_SIZE(ti_sn_bridge_volatile_ranges),
+};
+
+static const struct regmap_config ti_sn_bridge_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+	.volatile_table = &ti_sn_bridge_volatile_table,
+	.cache_type = REGCACHE_NONE,
+};
+
+static int ti_sn_bridge_power_ctrl(struct ti_sn_bridge *pdata, bool enable)
+{
+	int ret = 0;
+
+	mutex_lock(&pdata->lock);
+	if (enable)
+		pdata->ctrl_ref_count++;
+	else
+		pdata->ctrl_ref_count--;
+
+	if (enable && (pdata->ctrl_ref_count == 1)) {
+		ret = regulator_bulk_enable(pdata->num_supplies,
+						 pdata->supplies);
+		if (ret) {
+			DRM_ERROR("bridge regulator enable failed\n");
+			goto exit;
+		}
+
+		gpiod_set_value(pdata->enable_gpio, 1);
+	} else if (!enable && !pdata->ctrl_ref_count) {
+		gpiod_set_value(pdata->enable_gpio, 0);
+
+		regulator_bulk_disable(pdata->num_supplies, pdata->supplies);
+	} else {
+		DRM_DEBUG("ti_sn_bridge power ctrl: %d refcount: %d\n",
+						enable, pdata->ctrl_ref_count);
+	}
+
+exit:
+	mutex_unlock(&pdata->lock);
+	return ret;
+}
+
+/* Connector funcs */
+static struct ti_sn_bridge *
+connector_to_ti_sn_bridge(struct drm_connector *connector)
+{
+	return container_of(connector, struct ti_sn_bridge, connector);
+}
+
+static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector)
+{
+	struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
+	struct drm_panel *panel = pdata->panel;
+	struct edid *edid;
+
+	if (panel) {
+		DRM_DEBUG("get mode from connected drm_panel\n");
+		pdata->num_modes = drm_panel_get_modes(panel);
+		return pdata->num_modes;
+	}
+
+	/* get from EDID */
+	if (!pdata->ddc)
+		return 0;
+
+	ti_sn_bridge_power_ctrl(pdata, true);
+	edid = drm_get_edid(connector, pdata->ddc);
+	ti_sn_bridge_power_ctrl(pdata, false);
+	if (!edid)
+		return 0;
+
+	drm_mode_connector_update_edid_property(connector, edid);
+	pdata->num_modes = drm_add_edid_modes(connector, edid);
+	drm_edid_to_eld(connector, edid);
+	kfree(edid);
+
+	return pdata->num_modes;
+}
+
+static enum drm_mode_status
+ti_sn_bridge_connector_mode_valid(struct drm_connector *connector,
+			     struct drm_display_mode *mode)
+{
+	/* maximum supported resolution is 4K at 60 fps */
+	if (mode->clock > 594000)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
+static struct drm_connector_helper_funcs ti_sn_bridge_connector_helper_funcs = {
+	.get_modes = ti_sn_bridge_connector_get_modes,
+	.mode_valid = ti_sn_bridge_connector_mode_valid,
+};
+
+static enum drm_connector_status
+ti_sn_bridge_connector_detect(struct drm_connector *connector, bool force)
+{
+	struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
+
+	/**
+	 * TODO: Currently if drm_panel is present, then always
+	 * return the status as connected. Need to add support to detect
+	 * device state for no panel(hot pluggable) scenarios.
+	 */
+	if (pdata->panel)
+		return connector_status_connected;
+	else
+		return connector_status_unknown;
+}
+
+static const struct drm_connector_funcs ti_sn_bridge_connector_funcs = {
+	.fill_modes = drm_helper_probe_single_connector_modes,
+	.detect = ti_sn_bridge_connector_detect,
+	.destroy = drm_connector_cleanup,
+	.reset = drm_atomic_helper_connector_reset,
+	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static struct ti_sn_bridge *bridge_to_ti_sn_bridge(struct drm_bridge *bridge)
+{
+	return container_of(bridge, struct ti_sn_bridge, bridge);
+}
+
+static int ti_sn_bridge_read_device_rev(struct ti_sn_bridge *pdata)
+{
+	unsigned int rev = 0;
+	int ret = 0;
+
+	ret = regmap_read(pdata->regmap, SN_DEVICE_REV_REG, &rev);
+	if (ret)
+		return ret;
+
+	if (rev != SN_BRIDGE_REVISION_ID) {
+		DRM_ERROR("ti_sn_bridge revision id: 0x%x mismatch\n", rev);
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+static const char * const ti_sn_bridge_supply_names[] = {
+	"vccio",
+	"vpll",
+	"vcca",
+	"vcc",
+};
+
+static int ti_sn_bridge_parse_regulators(struct ti_sn_bridge *pdata)
+{
+	unsigned int i;
+
+	pdata->num_supplies = ARRAY_SIZE(ti_sn_bridge_supply_names);
+
+	pdata->supplies = devm_kcalloc(pdata->dev, pdata->num_supplies,
+				     sizeof(*pdata->supplies), GFP_KERNEL);
+	if (!pdata->supplies)
+		return -ENOMEM;
+
+	for (i = 0; i < pdata->num_supplies; i++)
+		pdata->supplies[i].supply = ti_sn_bridge_supply_names[i];
+
+	return devm_regulator_bulk_get(pdata->dev,
+				pdata->num_supplies, pdata->supplies);
+}
+
+static int ti_sn_bridge_attach_panel(struct ti_sn_bridge *pdata)
+{
+	struct device_node *panel_node, *port, *endpoint;
+
+	pdata->panel = NULL;
+	port = of_graph_get_port_by_id(pdata->dev->of_node, 1);
+	if (port) {
+		endpoint = of_get_child_by_name(port, "endpoint");
+		of_node_put(port);
+		if (!endpoint) {
+			DRM_ERROR("no output endpoint found\n");
+			return -EINVAL;
+		}
+
+		panel_node = of_graph_get_remote_port_parent(endpoint);
+		of_node_put(endpoint);
+		if (!panel_node) {
+			DRM_ERROR("no output node found\n");
+			return -EINVAL;
+		}
+
+		pdata->panel = of_drm_find_panel(panel_node);
+		of_node_put(panel_node);
+		if (!pdata->panel) {
+			DRM_ERROR("no panel node found\n");
+			return -EINVAL;
+		}
+		drm_panel_attach(pdata->panel, &pdata->connector);
+		DRM_DEBUG("panel attached\n");
+	}
+
+	return 0;
+}
+
+static int ti_sn_bridge_attach(struct drm_bridge *bridge)
+{
+	struct mipi_dsi_host *host;
+	struct mipi_dsi_device *dsi;
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+	int ret;
+	const struct mipi_dsi_device_info info = { .type = "ti_sn_bridge",
+						   .channel = 0,
+						   .node = NULL,
+						 };
+
+	if (!bridge->encoder) {
+		DRM_ERROR("Parent encoder object not found\n");
+		return -ENODEV;
+	}
+
+	/* HPD not supported */
+	pdata->connector.polled = 0;
+
+	ret = drm_connector_init(bridge->dev, &pdata->connector,
+				 &ti_sn_bridge_connector_funcs,
+				 DRM_MODE_CONNECTOR_eDP);
+	if (ret) {
+		DRM_ERROR("Failed to initialize connector with drm\n");
+		return ret;
+	}
+
+	drm_connector_helper_add(&pdata->connector,
+				 &ti_sn_bridge_connector_helper_funcs);
+	drm_mode_connector_attach_encoder(&pdata->connector, bridge->encoder);
+
+	host = of_find_mipi_dsi_host_by_node(pdata->host_node);
+	if (!host) {
+		DRM_ERROR("failed to find dsi host\n");
+		return -ENODEV;
+	}
+
+	dsi = mipi_dsi_device_register_full(host, &info);
+	if (IS_ERR(dsi)) {
+		DRM_ERROR("failed to create dsi device\n");
+		ret = PTR_ERR(dsi);
+		return ret;
+	}
+
+	/* TODO: setting to 4 lanes always for now */
+	dsi->lanes = 4;
+	dsi->format = MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+			  MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
+
+	ret = mipi_dsi_attach(dsi);
+	if (ret < 0) {
+		DRM_ERROR("failed to attach dsi to host\n");
+		mipi_dsi_device_unregister(dsi);
+		return ret;
+	}
+
+	pdata->dsi = dsi;
+
+	DRM_DEBUG("bridge attached\n");
+	/* attach panel to bridge */
+	ti_sn_bridge_attach_panel(pdata);
+
+	return 0;
+}
+
+static void ti_sn_bridge_mode_set(struct drm_bridge *bridge,
+				    struct drm_display_mode *mode,
+				    struct drm_display_mode *adj_mode)
+{
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+
+	DRM_DEBUG("mode_set: hdisplay=%d, vdisplay=%d, vrefresh=%d, clock=%d\n",
+		adj_mode->hdisplay, adj_mode->vdisplay,
+		adj_mode->vrefresh, adj_mode->clock);
+
+	drm_mode_copy(&pdata->curr_mode, adj_mode);
+}
+
+static void ti_sn_bridge_disable(struct drm_bridge *bridge)
+{
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+	struct drm_panel *panel = pdata->panel;
+
+	if (panel) {
+		drm_panel_disable(panel);
+		drm_panel_unprepare(panel);
+	}
+
+	/* disable video stream */
+	regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG,
+			SN_ENABLE_VID_STREAM_BIT, 0);
+	/* semi auto link training mode OFF */
+	regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0);
+	/* disable DP PLL */
+	regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0);
+}
+
+/* reference clk frequencies supported by the bridge in KHz */
+u32 ti_sn_bridge_ref_clk_table[] = {
+	12000,
+	19200,
+	26000,
+	27000,
+	38400,
+};
+
+static void ti_sn_bridge_set_refclk(struct ti_sn_bridge *pdata)
+{
+	int i = 0;
+
+	for (i = 0; i < ARRAY_SIZE(ti_sn_bridge_ref_clk_table); i++)
+		if (ti_sn_bridge_ref_clk_table[i] == pdata->refclk_khz)
+			break;
+	regmap_write(pdata->regmap, SN_REFCLK_FREQ_REG,
+		(DPPLL_CLK_SRC_REFCLK | (i << SN_DSIA_REFCLK_OFFSET)));
+}
+
+struct dp_data_rate {
+	unsigned int bit_val;
+	unsigned int dp_rate;
+};
+
+/* dp data rate supported by the bridge Mbps */
+static struct dp_data_rate ti_sn_bridge_dp_rate_table[] = {
+	{1, 1620},
+	{2, 2160},
+	{3, 2430},
+	{4, 2700},
+	{5, 3240},
+	{6, 4320},
+	{7, 5400},
+};
+
+static void ti_sn_bridge_set_dsi_dp_rate(struct ti_sn_bridge *pdata)
+{
+	unsigned int bit_rate_mhz, clk_freq_mhz, dp_rate_mhz;
+	unsigned int val = 0, i = 0;
+	struct drm_display_mode *mode = &pdata->curr_mode;
+
+	/* set DSIA clk frequency */
+	bit_rate_mhz = (mode->clock / 1000) *
+			mipi_dsi_pixel_format_to_bpp(pdata->dsi->format);
+	clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2);
+
+	/* for each increment in val, frequency increases by 5MHz */
+	val = (MIN_DSI_CLK_FREQ_MHZ / 5) +
+		(((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF);
+	regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val);
+
+	/* set DP data rate */
+	dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) /
+							DP_CLK_FUDGE_DEN;
+	for (i = 0; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_table); i++)
+		if (ti_sn_bridge_dp_rate_table[i].dp_rate > dp_rate_mhz)
+			break;
+	if (i == ARRAY_SIZE(ti_sn_bridge_dp_rate_table))
+		i--; /* set to maximum possible */
+
+	val = ti_sn_bridge_dp_rate_table[i].bit_val << SN_DP_DATA_RATE_OFFSET;
+	regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG,
+						SN_DP_DATA_RATE_BITS, val);
+}
+
+static void ti_sn_bridge_set_video_timings(struct ti_sn_bridge *pdata)
+{
+	struct drm_display_mode *mode = &pdata->curr_mode;
+
+	regmap_write(pdata->regmap, SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG,
+			mode->hdisplay & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_ACTIVE_LINE_LENGTH_HIGH_REG,
+			(mode->hdisplay >> SN_TIMING_HIGH_OFFSET) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG,
+			mode->vdisplay & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VERTICAL_DISPLAY_SIZE_HIGH_REG,
+			(mode->vdisplay >> SN_TIMING_HIGH_OFFSET) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG,
+			(mode->hsync_end - mode->hsync_start) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG,
+			((mode->hsync_end - mode->hsync_start) >>
+			 SN_TIMING_HIGH_OFFSET) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG,
+			(mode->vsync_end - mode->vsync_start) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG,
+			((mode->vsync_end - mode->vsync_start) >>
+			 SN_TIMING_HIGH_OFFSET) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG,
+			(mode->htotal - mode->hsync_end) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG,
+			(mode->vtotal - mode->vsync_end) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG,
+			(mode->hsync_start - mode->hdisplay) & 0xFF);
+	regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG,
+			(mode->vsync_start - mode->vdisplay) & 0xFF);
+	usleep_range(10000, 10050); /* 10ms delay recommended by spec */
+}
+
+static void ti_sn_bridge_enable(struct drm_bridge *bridge)
+{
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+	struct drm_panel *panel = pdata->panel;
+	unsigned int val = 0;
+
+	if (panel)
+		drm_panel_prepare(panel);
+
+	/* DSI_A lane config */
+	val = (4 - pdata->dsi->lanes) << SN_DSIA_LANE_OFFSET;
+	regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG,
+					SN_DSIA_NUM_LANES_BITS, val);
+
+	/* DP lane config */
+	val = (pdata->dsi->lanes - 1) << SN_DP_LANE_OFFSET;
+	regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG,
+					SN_DP_NUM_LANES_BITS, val);
+
+	/* set dsi/dp clk frequency value */
+	ti_sn_bridge_set_dsi_dp_rate(pdata);
+
+	/* enable DP PLL */
+	regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1);
+	usleep_range(10000, 10050); /* 10ms delay recommended by spec */
+
+	/**
+	 * The SN65DSI86 only supports ASSR Display Authentication method and
+	 * this method is enabled by default. An eDP panel must support this
+	 * authentication method. We need to enable this method in the eDP panel
+	 * at DisplayPort address 0x0010A prior to link training.
+	 */
+	regmap_write(pdata->regmap, SN_AUX_WDATA0_REG, 0x01);
+	regmap_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, 0x00);
+	regmap_write(pdata->regmap, SN_AUX_ADDR_15_8_REG, 0x01);
+	regmap_write(pdata->regmap, SN_AUX_ADDR_7_0_REG, 0x0A);
+	regmap_write(pdata->regmap, SN_AUX_LENGTH_REG, 0x01);
+	regmap_write(pdata->regmap, SN_AUX_CMD_REG, 0x81);
+	usleep_range(10000, 10050); /* 10ms delay recommended by spec */
+
+	/* Semi auto link training mode */
+	regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A);
+	msleep(20); /* 20ms delay recommended by spec */
+
+	/* config video parameters */
+	ti_sn_bridge_set_video_timings(pdata);
+
+	/* enable video stream */
+	regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG,
+			   SN_ENABLE_VID_STREAM_BIT, SN_ENABLE_VID_STREAM_BIT);
+
+	if (panel)
+		drm_panel_enable(panel);
+}
+
+void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
+{
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+
+	ti_sn_bridge_power_ctrl(pdata, true);
+
+	/* configure bridge CLK_SRC and ref_clk */
+	ti_sn_bridge_set_refclk(pdata);
+}
+
+void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
+{
+	struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
+
+	ti_sn_bridge_power_ctrl(pdata, false);
+}
+
+static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
+	.attach = ti_sn_bridge_attach,
+	.pre_enable = ti_sn_bridge_pre_enable,
+	.enable = ti_sn_bridge_enable,
+	.disable = ti_sn_bridge_disable,
+	.post_disable = ti_sn_bridge_post_disable,
+	.mode_set = ti_sn_bridge_mode_set,
+};
+
+static int ti_sn_bridge_parse_dsi_host(struct ti_sn_bridge *pdata)
+{
+	struct device_node *np = pdata->dev->of_node;
+	struct device_node *end_node;
+
+	end_node = of_graph_get_endpoint_by_regs(np, 0, 0);
+	if (!end_node) {
+		DRM_ERROR("remote endpoint not found\n");
+		return -ENODEV;
+	}
+
+	pdata->host_node = of_graph_get_remote_port_parent(end_node);
+	of_node_put(end_node);
+	if (!pdata->host_node) {
+		DRM_ERROR("remote node not found\n");
+		return -ENODEV;
+	}
+	of_node_put(pdata->host_node);
+
+	return 0;
+}
+
+static int ti_sn_bridge_probe(struct i2c_client *client,
+	 const struct i2c_device_id *id)
+{
+	struct ti_sn_bridge *pdata;
+	struct device_node *ddc_node;
+	int ret = 0;
+
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		DRM_ERROR("device doesn't support I2C\n");
+		return -ENODEV;
+	}
+
+	pdata = devm_kzalloc(&client->dev,
+		sizeof(struct ti_sn_bridge), GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
+
+	pdata->dev = &client->dev;
+	DRM_DEBUG("I2C address is %x\n", client->addr);
+
+	pdata->regmap = devm_regmap_init_i2c(client,
+				&ti_sn_bridge_regmap_config);
+	if (IS_ERR(pdata->regmap))
+		return PTR_ERR(pdata->regmap);
+
+	pdata->enable_gpio = devm_gpiod_get(pdata->dev,
+					    "enable", GPIOD_OUT_LOW);
+	if (IS_ERR(pdata->enable_gpio)) {
+		DRM_ERROR("failed to get enable gpio from DT\n");
+		ret = PTR_ERR(pdata->enable_gpio);
+		return ret;
+	}
+
+	ret = ti_sn_bridge_parse_regulators(pdata);
+	if (ret) {
+		DRM_ERROR("failed to parse regulators\n");
+		return ret;
+	}
+
+	ret = of_property_read_u32(pdata->dev->of_node,
+			"refclk-freq-khz", &pdata->refclk_khz);
+	if (ret)
+		pdata->refclk_khz = SN_DEFAULT_REF_CLK_KHZ;
+
+	ret = ti_sn_bridge_parse_dsi_host(pdata);
+	if (ret)
+		return ret;
+
+	ddc_node = of_parse_phandle(pdata->dev->of_node, "ddc-i2c-bus", 0);
+	if (ddc_node) {
+		pdata->ddc = of_find_i2c_adapter_by_node(ddc_node);
+		of_node_put(ddc_node);
+		if (!pdata->ddc) {
+			dev_dbg(pdata->dev, "failed to read ddc node\n");
+			return -EPROBE_DEFER;
+		}
+	} else {
+		dev_dbg(pdata->dev, "no ddc property found\n");
+	}
+
+	ti_sn_bridge_power_ctrl(pdata, true);
+	ret = ti_sn_bridge_read_device_rev(pdata);
+	ti_sn_bridge_power_ctrl(pdata, false);
+	if (ret)
+		return ret;
+
+	i2c_set_clientdata(client, pdata);
+	mutex_init(&pdata->lock);
+
+	pdata->bridge.funcs = &ti_sn_bridge_funcs;
+	pdata->bridge.of_node = client->dev.of_node;
+
+	drm_bridge_add(&pdata->bridge);
+
+	DRM_DEBUG("bridge device registered successfully\n");
+
+	return 0;
+}
+
+static int ti_sn_bridge_remove(struct i2c_client *client)
+{
+	struct ti_sn_bridge *pdata = i2c_get_clientdata(client);
+
+	if (!pdata)
+		return -EINVAL;
+
+	mipi_dsi_detach(pdata->dsi);
+	mipi_dsi_device_unregister(pdata->dsi);
+
+	drm_bridge_remove(&pdata->bridge);
+	i2c_put_adapter(pdata->ddc);
+
+	return 0;
+}
+
+static struct i2c_device_id ti_sn_bridge_id[] = {
+	{ "ti,sn65dsi86", 0},
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, ti_sn_bridge_id);
+
+static const struct of_device_id ti_sn_bridge_match_table[] = {
+	{.compatible = "ti,sn65dsi86"},
+	{},
+};
+MODULE_DEVICE_TABLE(of, ti_sn_bridge_match_table);
+
+static struct i2c_driver ti_sn_bridge_driver = {
+	.driver = {
+		.name = "ti_sn65dsi86",
+		.owner = THIS_MODULE,
+		.of_match_table = ti_sn_bridge_match_table,
+	},
+	.probe = ti_sn_bridge_probe,
+	.remove = ti_sn_bridge_remove,
+	.id_table = ti_sn_bridge_id,
+};
+
+module_i2c_driver(ti_sn_bridge_driver);
+MODULE_DESCRIPTION("sn65dsi86 DSI to eDP bridge driver");
+MODULE_LICENSE("GPL v2");
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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Re: [PATCH v4 1/3] drm/bridge: add support for sn65dsi86 bridge driver

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 3823 bytes --]

Hi Sandeep,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.17-rc3 next-20180426]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Sandeep-Panda/Add-suppport-for-sn65dsi86-bridge-chip-and-Innolux-2k-edp-panel/20180430-035839
base:   git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:9: sparse: undefined identifier 'drm_edid_to_eld'
   drivers/gpu/drm/bridge/ti-sn65dsi86.c:400:5: sparse: symbol 'ti_sn_bridge_ref_clk_table' was not declared. Should it be static?
   drivers/gpu/drm/bridge/ti-sn65dsi86.c:553:6: sparse: symbol 'ti_sn_bridge_pre_enable' was not declared. Should it be static?
   drivers/gpu/drm/bridge/ti-sn65dsi86.c:563:6: sparse: symbol 'ti_sn_bridge_post_disable' was not declared. Should it be static?
   drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:24: sparse: call with no type!
   drivers/gpu/drm/bridge/ti-sn65dsi86.c: In function 'ti_sn_bridge_connector_get_modes':
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:2: error: implicit declaration of function 'drm_edid_to_eld'; did you mean 'drm_edid_to_sad'? [-Werror=implicit-function-declaration]
     drm_edid_to_eld(connector, edid);
     ^~~~~~~~~~~~~~~
     drm_edid_to_sad
   cc1: some warnings being treated as errors

sparse warnings: (new ones prefixed by >>)

   drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:9: sparse: undefined identifier 'drm_edid_to_eld'
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:400:5: sparse: symbol 'ti_sn_bridge_ref_clk_table' was not declared. Should it be static?
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:553:6: sparse: symbol 'ti_sn_bridge_pre_enable' was not declared. Should it be static?
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:563:6: sparse: symbol 'ti_sn_bridge_post_disable' was not declared. Should it be static?
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:24: sparse: call with no type!
   drivers/gpu/drm/bridge/ti-sn65dsi86.c: In function 'ti_sn_bridge_connector_get_modes':
   drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:2: error: implicit declaration of function 'drm_edid_to_eld'; did you mean 'drm_edid_to_sad'? [-Werror=implicit-function-declaration]
     drm_edid_to_eld(connector, edid);
     ^~~~~~~~~~~~~~~
     drm_edid_to_sad
   cc1: some warnings being treated as errors

vim +173 drivers/gpu/drm/bridge/ti-sn65dsi86.c

   148	
   149	static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector)
   150	{
   151		struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
   152		struct drm_panel *panel = pdata->panel;
   153		struct edid *edid;
   154	
   155		if (panel) {
   156			DRM_DEBUG("get mode from connected drm_panel\n");
   157			pdata->num_modes = drm_panel_get_modes(panel);
   158			return pdata->num_modes;
   159		}
   160	
   161		/* get from EDID */
   162		if (!pdata->ddc)
   163			return 0;
   164	
   165		ti_sn_bridge_power_ctrl(pdata, true);
   166		edid = drm_get_edid(connector, pdata->ddc);
   167		ti_sn_bridge_power_ctrl(pdata, false);
   168		if (!edid)
   169			return 0;
   170	
   171		drm_mode_connector_update_edid_property(connector, edid);
   172		pdata->num_modes = drm_add_edid_modes(connector, edid);
 > 173		drm_edid_to_eld(connector, edid);
   174		kfree(edid);
   175	
   176		return pdata->num_modes;
   177	}
   178	

---
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Re: [PATCH v4 1/3] drm/bridge: add support for sn65dsi86 bridge driver

[kbuild test robot]

Hi Sandeep,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.17-rc3 next-20180426]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Sandeep-Panda/Add-suppport-for-sn65dsi86-bridge-chip-and-Innolux-2k-edp-panel/20180430-035839
base:   git://people.freedesktop.org/~airlied/linux.git drm-next


coccinelle warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:711:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
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[PATCH] drm/bridge: fix platform_no_drv_owner.cocci warnings

[kbuild test robot]

From: Fengguang Wu <fengguang.wu@intel.com>

drivers/gpu/drm/bridge/ti-sn65dsi86.c:711:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Fixes: 90200d12a626 ("drm/bridge: add support for sn65dsi86 bridge driver")
CC: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

 ti-sn65dsi86.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
@@ -708,7 +708,6 @@ MODULE_DEVICE_TABLE(of, ti_sn_bridge_mat
 static struct i2c_driver ti_sn_bridge_driver = {
 	.driver = {
 		.name = "ti_sn65dsi86",
-		.owner = THIS_MODULE,
 		.of_match_table = ti_sn_bridge_match_table,
 	},
 	.probe = ti_sn_bridge_probe,
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Re: [PATCH v4 1/3] drm/bridge: add support for sn65dsi86 bridge driver

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2397 bytes --]

Hi Sandeep,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.17-rc3 next-20180426]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Sandeep-Panda/Add-suppport-for-sn65dsi86-bridge-chip-and-Innolux-2k-edp-panel/20180430-035839
base:   git://people.freedesktop.org/~airlied/linux.git drm-next
config: openrisc-allyesconfig (attached as .config)
compiler: or1k-linux-gcc (GCC) 6.0.0 20160327 (experimental)
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=openrisc 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/bridge/ti-sn65dsi86.c: In function 'ti_sn_bridge_connector_get_modes':
>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:173:2: error: implicit declaration of function 'drm_edid_to_eld' [-Werror=implicit-function-declaration]
     drm_edid_to_eld(connector, edid);
     ^~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/drm_edid_to_eld +173 drivers/gpu/drm/bridge/ti-sn65dsi86.c

   148	
   149	static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector)
   150	{
   151		struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
   152		struct drm_panel *panel = pdata->panel;
   153		struct edid *edid;
   154	
   155		if (panel) {
   156			DRM_DEBUG("get mode from connected drm_panel\n");
   157			pdata->num_modes = drm_panel_get_modes(panel);
   158			return pdata->num_modes;
   159		}
   160	
   161		/* get from EDID */
   162		if (!pdata->ddc)
   163			return 0;
   164	
   165		ti_sn_bridge_power_ctrl(pdata, true);
   166		edid = drm_get_edid(connector, pdata->ddc);
   167		ti_sn_bridge_power_ctrl(pdata, false);
   168		if (!edid)
   169			return 0;
   170	
   171		drm_mode_connector_update_edid_property(connector, edid);
   172		pdata->num_modes = drm_add_edid_modes(connector, edid);
 > 173		drm_edid_to_eld(connector, edid);
   174		kfree(edid);
   175	
   176		return pdata->num_modes;
   177	}
   178	

---
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[PATCH v4 2/3] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings

[Sandeep Panda]

Document the bindings used for the sn65dsi86 DSI to eDP bridge.

Changes in v1:
 - Rephrase the dt-binding descriptions to be more inline with existing
   bindings (Andrzej Hajda).
 - Add missing dt-binding that are parsed by corresponding driver
   (Andrzej Hajda).

Changes in v2:
 - Remove edp panel specific dt-binding entries. Only keep bridge
   specific entries (Sean Paul).
 - Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul).
 - Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul).

Changes in v3:
 - Remove irq-gpio dt entry and instead populate is an interrupt
   property (Rob Herring).

Changes in v4:
 - Add link to bridge chip datasheet (Stephen Boyd)
 - Add vpll and vcc regulator supply bindings (Stephen Boyd)
 - Add ref clk optional dt binding (Stephen Boyd)
 - Add gpio-controller optional dt binding (Stephen Boyd)

Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
---
 .../bindings/display/bridge/ti,sn65dsi86.txt       | 76 ++++++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
new file mode 100644
index 0000000..0d042ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
@@ -0,0 +1,76 @@
+SN65DSI86 DSI to eDP bridge chip
+--------------------------------
+
+This is the binding for Texas Instruments SN65DSI86 bridge.
+http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
+
+Required properties:
+- compatible: Must be "ti,sn65dsi86"
+- reg: i2c address of the chip, 0x2d as per datasheet
+- enable-gpios: OF device-tree gpio specification for bridge_en pin
+
+- vccio-supply: A 1.8V supply that powers up the digital IOs.
+- vpll-supply: A 1.8V supply that powers up the displayport PLL.
+- vcca-supply: A 1.2V supply that powers up the analog circuits.
+- vcc-supply: A 1.2V supply that powers up the digital core.
+
+Optional properties:
+- interrupts: Specifier for the SN65DSI86 interrupt line.
+- hpd-gpios: OF device-tree gpio specifications for HPD pin.
+
+- refclk-freq-khz: Value specifying the frequency of reference clock in KHz unit.
+
+- gpio-controller: Marks the device has a GPIO controller.
+- #gpio-cells: Number of GPIO cells. Refer to binding document "gpio/gpio.txt"
+- #pwm-cells : Number of cells used to specify a PWM. See pwm.txt in this directory
+	       for a description of the cell formats.
+
+Required nodes:
+
+This device has two video ports. Their connections are modelled using the
+OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
+
+- Video port 0 for DSI input
+- Video port 1 for eDP output
+
+Example
+-------
+
+edp-bridge@2d {
+	compatible = "ti,sn65dsi86";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	reg = <0x2d>;
+
+	enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
+	interrupt-parent = <&gpio3>;
+	interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+
+	vccio-supply = <&pm8916_l17>;
+	vcca-supply = <&pm8916_l6>;
+	vpll-supply = <&pm8916_l17>;
+	vcc-supply = <&pm8916_l6>;
+
+	refclk-freq-khz = <19200>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			edp_bridge_in: endpoint {
+				remote-endpoint = <&dsi_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			edp_bridge_out: endpoint {
+				remote-endpoint = <&edp_panel_in>;
+			};
+		};
+	};
+}
-- 
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a Linux Foundation Collaborative Project

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Re: [PATCH v4 2/3] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings

[Rob Herring]

On Fri, Apr 27, 2018 at 4:39 AM, Sandeep Panda <spanda@codeaurora.org> wrote:
> Document the bindings used for the sn65dsi86 DSI to eDP bridge.
>
> Changes in v1:
>  - Rephrase the dt-binding descriptions to be more inline with existing
>    bindings (Andrzej Hajda).
>  - Add missing dt-binding that are parsed by corresponding driver
>    (Andrzej Hajda).
>
> Changes in v2:
>  - Remove edp panel specific dt-binding entries. Only keep bridge
>    specific entries (Sean Paul).
>  - Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul).
>  - Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul).
>
> Changes in v3:
>  - Remove irq-gpio dt entry and instead populate is an interrupt
>    property (Rob Herring).
>
> Changes in v4:
>  - Add link to bridge chip datasheet (Stephen Boyd)
>  - Add vpll and vcc regulator supply bindings (Stephen Boyd)
>  - Add ref clk optional dt binding (Stephen Boyd)
>  - Add gpio-controller optional dt binding (Stephen Boyd)
>
> Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
> ---
>  .../bindings/display/bridge/ti,sn65dsi86.txt       | 76 ++++++++++++++++++++++
>  1 file changed, 76 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt

Reviewed-by: Rob Herring <robh@kernel.org>
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[PATCH v4 3/3] drm/panel: add support for Innolux TV123WAM panel

[Sandeep Panda]

Innolux TV123WAM is a 12.3" eDP display panel with
2160x1440 resolution, which can be supported by simple
panel driver.

Changes in v1:
 - Make use of simple panel driver instead of creating
   a new driver for this panel (Sean Paul).
 - Combine dt-binding and driver changes into one patch
   as done by other existing panel support changes.

Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
---
 .../bindings/display/panel/innolux,tv123wam.txt    |  7 ++++++
 drivers/gpu/drm/panel/panel-simple.c               | 27 ++++++++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt

diff --git a/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt b/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
new file mode 100644
index 0000000..c12e714
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
@@ -0,0 +1,7 @@
+Innolux TV123WAM 12.3 inch eDP 2K display panel
+
+Required properties:
+- compatible: should be "innolux,tv123wam"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 234af81..52bbcfb 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1939,6 +1939,30 @@ static void panel_simple_shutdown(struct device *dev)
 	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
 };
 
+static const struct drm_display_mode innolux_tv123wam_mode = {
+	.clock = 206016,
+	.hdisplay = 2160,
+	.hsync_start = 2160 + 48,
+	.hsync_end = 2160 + 48 + 32,
+	.htotal = 2160 + 48 + 32 + 80,
+	.vdisplay = 1440,
+	.vsync_start = 1440 + 3,
+	.vsync_end = 1440 + 3 + 10,
+	.vtotal = 1440 + 3 + 10 + 27,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
+};
+
+static const struct panel_desc innolux_tv123wam = {
+	.modes = &innolux_tv123wam_mode,
+	.num_modes = 1,
+	.bpc = 8,
+	.size = {
+		.width = 259,
+		.height = 173,
+	},
+};
+
 static const struct of_device_id platform_of_match[] = {
 	{
 		.compatible = "ampire,am-480272h3tmqw-t01h",
@@ -2142,6 +2166,9 @@ static void panel_simple_shutdown(struct device *dev)
 		.compatible = "winstar,wf35ltiacd",
 		.data = &winstar_wf35ltiacd,
 	}, {
+		.compatible = "innolux,tv123wam",
+		.data = &innolux_tv123wam,
+	}, {
 		/* sentinel */
 	}
 };
-- 
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a Linux Foundation Collaborative Project

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Re: [PATCH v4 3/3] drm/panel: add support for Innolux TV123WAM panel

[Rob Herring]

On Fri, Apr 27, 2018 at 03:09:42PM +0530, Sandeep Panda wrote:
> Innolux TV123WAM is a 12.3" eDP display panel with
> 2160x1440 resolution, which can be supported by simple
> panel driver.
> 
> Changes in v1:
>  - Make use of simple panel driver instead of creating
>    a new driver for this panel (Sean Paul).
>  - Combine dt-binding and driver changes into one patch
>    as done by other existing panel support changes.

While allowed, having them separate is preferred.

> 
> Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
> ---
>  .../bindings/display/panel/innolux,tv123wam.txt    |  7 ++++++
>  drivers/gpu/drm/panel/panel-simple.c               | 27 ++++++++++++++++++++++
>  2 files changed, 34 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt b/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
> new file mode 100644
> index 0000000..c12e714
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
> @@ -0,0 +1,7 @@
> +Innolux TV123WAM 12.3 inch eDP 2K display panel
> +
> +Required properties:
> +- compatible: should be "innolux,tv123wam"
> +
> +This binding is compatible with the simple-panel binding, which is specified
> +in simple-panel.txt in this directory.

You need to state exactly what properties from this apply.

Rob
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Re: [PATCH 1/2] drm/bridge: add Silicon Image SiI9234 driver

[kbuild test robot]

Hi Maciej,

[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.13-rc3 next-20170803]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Maciej-Purski/add-Silicon-Image-SiI9234-driver/20170803-200255
base:   git://people.freedesktop.org/~airlied/linux.git drm-next


coccinelle warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/bridge/sii9234.c:1010:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[PATCH] drm/bridge: fix platform_no_drv_owner.cocci warnings

[kbuild test robot]

drivers/gpu/drm/bridge/sii9234.c:1010:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Fixes: 9d5babbeda8a ("drm/bridge: add Silicon Image SiI9234 driver")
CC: Maciej Purski <m.purski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Fengguang Wu <fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---

 sii9234.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/gpu/drm/bridge/sii9234.c
+++ b/drivers/gpu/drm/bridge/sii9234.c
@@ -1007,7 +1007,6 @@ MODULE_DEVICE_TABLE(i2c, sii9234_id);
 static struct i2c_driver sii9234_driver = {
 	.driver = {
 		.name	= "sii9234",
-		.owner	= THIS_MODULE,
 		.of_match_table = of_match_ptr(sii9234_dt_match),
 	},
 	.probe		= sii9234_mhl_tx_i2c_probe,
--
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Re: [RFC 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

[kbuild test robot]

Hi Jitao,

[auto build test WARNING on drm-exynos/exynos-drm/for-next -- if it's inappropriate base, please suggest rules for selecting the more suitable base]

url:    https://github.com/0day-ci/linux/commits/CK-Hu/Dcumentation-bridge-Add-documentation-for-ps8640-DT-properties/20151016-201658


coccinelle warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/bridge/parade-ps8640.c:480:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
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[RFC 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

[CK Hu]

From: Jitao Shi <jitao.shi@mediatek.com>

This patch adds drm_bridge driver for parade DSI
to eDP bridge chip.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
 drivers/gpu/drm/bridge/Kconfig         |    9 +
 drivers/gpu/drm/bridge/Makefile        |    1 +
 drivers/gpu/drm/bridge/parade-ps8640.c |  489 ++++++++++++++++++++++++++++++++
 3 files changed, 499 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 2de52a5..8ecaeed 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -29,4 +29,13 @@ config DRM_PARADE_PS8622
 	---help---
 	  Parade eDP-LVDS bridge chip driver.
 
+config DRM_PARADE_PS8640
+	bool "Parade PS8640 MIPI DSI to eDP Converter"
+	select DRM_KMS_HELPER
+	select DRM_PANEL
+	---help---
+	  Choose this option if you have PS8640 for display
+	  The PS8640 is a high-performance and low-power
+	  MIPI DSI to eDP converter
+
 endmenu
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index e2eef1c..da9e4a4 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -3,3 +3,4 @@ ccflags-y := -Iinclude/drm
 obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
new file mode 100644
index 0000000..dc62dd7
--- /dev/null
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -0,0 +1,489 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_edid.h>
+
+#define PAGE2_GPIO_L	0xa6
+#define PAGE2_GPIO_H	0xa7
+#define PS_GPIO9	BIT(1)
+
+#define PAGE4_REV_L	0xf0
+#define PAGE4_REV_H	0xf1
+#define PAGE4_CHIP_L	0xf2
+#define PAGE4_CHIP_H	0xf3
+
+#define bridge_to_ps8640(e)	container_of(e, struct ps8640, bridge)
+#define connector_to_ps8640(e)	container_of(e, struct ps8640, connector)
+
+struct ps8640 {
+	struct drm_connector connector;
+	struct drm_bridge bridge;
+	struct i2c_client *client;
+	struct ps8640_driver_data *driver_data;
+	struct regulator *pwr_1v2_supply;
+	struct regulator *pwr_3v3_supply;
+	struct drm_panel *panel;
+	struct gpio_desc *gpio_rst_n;
+	struct gpio_desc *gpio_pwr_n;
+	struct gpio_desc *gpio_mode_sel_n;
+	void *edid;
+	u16 base_reg;
+	bool enabled;
+};
+
+static int ps8640_regr(struct i2c_client *client, u16 i2c_addr,
+		       u8 reg, u8 *value)
+{
+	int ret;
+
+	client->addr = i2c_addr;
+
+	ret = i2c_master_send(client, &reg, 1);
+	if (ret <= 0) {
+		DRM_ERROR("Failed to send i2c command, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = i2c_master_recv(client, value, 1);
+	if (ret <= 0) {
+		DRM_ERROR("Failed to recv i2c data, ret=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int ps8640_regw(struct i2c_client *client, u16 i2c_addr,
+		       u8 reg, u8 value)
+{
+	int ret;
+	char buf[2];
+
+	client->addr = i2c_addr;
+
+	buf[0] = reg;
+	buf[1] = value;
+	ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
+	if (ret <= 0) {
+		DRM_ERROR("Failed to send i2c command, ret=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int ps8640_check_valid_id(struct ps8640 *ps_bridge)
+{
+	struct i2c_client *client = ps_bridge->client;
+	u8 rev_id_low, rev_id_high, chip_id_low, chip_id_high;
+	int retry_cnt = 0;
+
+	do {
+		ps8640_regr(client, ps_bridge->base_reg + 4, PAGE4_CHIP_H,
+			    &chip_id_high);
+		if (chip_id_high != 0x30)
+			DRM_INFO("chip_id_high = 0x%x\n", chip_id_high);
+	} while ((retry_cnt++ < 2) && (chip_id_high != 0x30));
+
+	ps8640_regr(client, ps_bridge->base_reg + 4, PAGE4_REV_L, &rev_id_low);
+	ps8640_regr(client, ps_bridge->base_reg + 4, PAGE4_REV_H, &rev_id_high);
+	ps8640_regr(client, ps_bridge->base_reg + 4, PAGE4_CHIP_L,
+		    &chip_id_low);
+
+	if ((rev_id_low == 0x00) && (rev_id_high == 0x0a) &&
+	    (chip_id_low == 0x00) && (chip_id_high == 0x30))
+		return 1;
+
+	return 0;
+}
+
+static void ps8640_show_mcu_fw_version(struct ps8640 *ps_bridge)
+{
+	struct i2c_client *client = ps_bridge->client;
+	u8 major_ver, minor_ver;
+
+	ps8640_regr(client, ps_bridge->base_reg + 5, 0x4, &major_ver);
+	ps8640_regr(client, ps_bridge->base_reg + 5, 0x5, &minor_ver);
+
+	DRM_INFO_ONCE("ps8640 rom fw version %d.%d\n", major_ver, minor_ver);
+}
+
+static int ps8640_bdg_enable(struct ps8640 *ps_bridge)
+{
+	struct i2c_client *client = ps_bridge->client;
+
+	if (ps8640_check_valid_id(ps_bridge)) {
+		ps8640_regw(client, ps_bridge->base_reg + 3, 0xfe, 0x13);
+		ps8640_regw(client, ps_bridge->base_reg + 3, 0xff, 0x18);
+		ps8640_regw(client, ps_bridge->base_reg + 3, 0xfe, 0x13);
+		ps8640_regw(client, ps_bridge->base_reg + 3, 0xff, 0x1c);
+
+		return 0;
+	}
+
+	return -1;
+}
+
+static void ps8640_prepare(struct ps8640 *ps_bridge)
+{
+	struct i2c_client *client = ps_bridge->client;
+	int err, retry_cnt = 0;
+	u8 set_vdo_done;
+
+	if (ps_bridge->enabled)
+		return;
+
+	if (drm_panel_prepare(ps_bridge->panel)) {
+		DRM_ERROR("failed to prepare panel\n");
+		return;
+	}
+
+	err = regulator_enable(ps_bridge->pwr_1v2_supply);
+	if (err < 0) {
+		DRM_ERROR("failed to enable pwr_1v2_supply: %d\n", err);
+		return;
+	}
+
+	err = regulator_enable(ps_bridge->pwr_3v3_supply);
+	if (err < 0) {
+		DRM_ERROR("failed to enable pwr_3v3_supply: %d\n", err);
+		return;
+	}
+
+	gpiod_set_value(ps_bridge->gpio_pwr_n, 1);
+	gpiod_set_value(ps_bridge->gpio_rst_n, 0);
+	usleep_range(500, 700);
+	gpiod_set_value(ps_bridge->gpio_rst_n, 1);
+
+	do {
+		msleep(50);
+		ps8640_regr(client, ps_bridge->base_reg + 2, PAGE2_GPIO_H,
+			    &set_vdo_done);
+	} while ((retry_cnt++ < 70) && ((set_vdo_done & PS_GPIO9) != PS_GPIO9));
+
+	ps8640_show_mcu_fw_version(ps_bridge);
+	ps_bridge->enabled = true;
+}
+
+static void ps8640_pre_enable(struct drm_bridge *bridge)
+{
+	struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+
+	ps8640_prepare(ps_bridge);
+}
+
+static void ps8640_enable(struct drm_bridge *bridge)
+{
+	struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+
+	ps8640_bdg_enable(ps_bridge);
+
+	if (drm_panel_enable(ps_bridge->panel)) {
+		DRM_ERROR("failed to enable panel\n");
+		return;
+	}
+}
+
+static void ps8640_disable(struct drm_bridge *bridge)
+{
+	struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+
+	if (!ps_bridge->enabled)
+		return;
+
+	ps_bridge->enabled = false;
+
+	if (drm_panel_disable(ps_bridge->panel)) {
+		DRM_ERROR("failed to disable panel\n");
+		return;
+	}
+
+	regulator_disable(ps_bridge->pwr_1v2_supply);
+	regulator_disable(ps_bridge->pwr_3v3_supply);
+	gpiod_set_value(ps_bridge->gpio_rst_n, 0);
+	gpiod_set_value(ps_bridge->gpio_pwr_n, 0);
+}
+
+static void ps8640_post_disable(struct drm_bridge *bridge)
+{
+	struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+
+	if (drm_panel_unprepare(ps_bridge->panel)) {
+		DRM_ERROR("failed to unprepare panel\n");
+		return;
+	}
+}
+
+static int ps8640_get_modes(struct drm_connector *connector)
+{
+	struct ps8640 *ps_bridge = connector_to_ps8640(connector);
+	struct i2c_client *client = ps_bridge->client;
+
+	ps8640_prepare(ps_bridge);
+	ps8640_regw(client, ps_bridge->base_reg + 2, 0xea, 0xd0);
+
+	return drm_panel_get_modes(ps_bridge->panel);
+}
+
+static struct drm_encoder *ps8640_best_encoder(struct drm_connector *connector)
+{
+	struct ps8640 *ps_bridge;
+
+	ps_bridge = connector_to_ps8640(connector);
+	return ps_bridge->bridge.encoder;
+}
+
+static const struct drm_connector_helper_funcs
+	ps8640_connector_helper_funcs = {
+	.get_modes = ps8640_get_modes,
+	.best_encoder = ps8640_best_encoder,
+};
+
+static enum drm_connector_status ps8640_detect(struct drm_connector *connector,
+					       bool force)
+{
+	return connector_status_connected;
+}
+
+static void ps8640_connector_destroy(struct drm_connector *connector)
+{
+	drm_connector_unregister(connector);
+	drm_connector_cleanup(connector);
+}
+
+static const struct drm_connector_funcs ps8640_connector_funcs = {
+	.dpms = drm_atomic_helper_connector_dpms,
+	.fill_modes = drm_helper_probe_single_connector_modes,
+	.detect = ps8640_detect,
+	.destroy = ps8640_connector_destroy,
+	.reset = drm_atomic_helper_connector_reset,
+	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+int ps8640_bridge_attach(struct drm_bridge *bridge)
+{
+	struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+	int ret;
+
+	if (!bridge->encoder) {
+		DRM_ERROR("Parent encoder object not found");
+		return -ENODEV;
+	}
+
+	ret = drm_connector_init(bridge->dev, &ps_bridge->connector,
+				 &ps8640_connector_funcs,
+				 DRM_MODE_CONNECTOR_eDP);
+
+	if (ret) {
+		DRM_ERROR("Failed to initialize connector with drm\n");
+		return ret;
+	}
+
+	drm_connector_helper_add(&ps_bridge->connector,
+				 &ps8640_connector_helper_funcs);
+	drm_connector_register(&ps_bridge->connector);
+
+	ps_bridge->connector.dpms = DRM_MODE_DPMS_ON;
+	drm_mode_connector_attach_encoder(&ps_bridge->connector,
+					  bridge->encoder);
+
+	if (ps_bridge->panel)
+		drm_panel_attach(ps_bridge->panel, &ps_bridge->connector);
+
+	return ret;
+}
+
+static bool ps8640_bridge_mode_fixup(struct drm_bridge *bridge,
+				     const struct drm_display_mode *mode,
+				     struct drm_display_mode *adjusted_mode)
+{
+	return true;
+}
+
+static const struct drm_bridge_funcs ps8640_bridge_funcs = {
+	.attach = ps8640_bridge_attach,
+	.mode_fixup = ps8640_bridge_mode_fixup,
+	.disable = ps8640_disable,
+	.post_disable = ps8640_post_disable,
+	.pre_enable = ps8640_pre_enable,
+	.enable = ps8640_enable,
+};
+
+static int ps8640_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct ps8640 *ps_bridge;
+	struct device_node *np = dev->of_node;
+	struct device_node *in_ep, *out_ep;
+	struct device_node *panel_node = NULL;
+	int ret, size;
+	u32 temp_reg;
+	const u8 *edidp;
+
+	ps_bridge = devm_kzalloc(dev, sizeof(*ps_bridge), GFP_KERNEL);
+	if (!ps_bridge)
+		return -ENOMEM;
+
+	/* FIXME - use of_graph_get_port_by_id(np, 1) on newer kernels */
+	in_ep = of_graph_get_next_endpoint(np, NULL);
+	if (in_ep) {
+		out_ep = of_graph_get_next_endpoint(np, in_ep);
+		of_node_put(in_ep);
+		if (out_ep) {
+			panel_node = of_graph_get_remote_port_parent(out_ep);
+			of_node_put(out_ep);
+		}
+	}
+	if (panel_node) {
+		ps_bridge->panel = of_drm_find_panel(panel_node);
+		of_node_put(panel_node);
+		if (!ps_bridge->panel)
+			return -EPROBE_DEFER;
+	}
+
+	ps_bridge->client = client;
+
+	edidp = of_get_property(np, "edid", &size);
+
+	if (edidp)
+		ps_bridge->edid = devm_kmemdup(&client->dev, edidp, size,
+					       GFP_KERNEL);
+
+	ps_bridge->pwr_3v3_supply = devm_regulator_get(dev, "ps8640-3v3");
+	if (IS_ERR(ps_bridge->pwr_3v3_supply)) {
+		dev_err(dev, "cannot get ps_bridge->pwr_3v3_supply\n");
+		return PTR_ERR(ps_bridge->pwr_3v3_supply);
+	}
+
+	ps_bridge->pwr_1v2_supply = devm_regulator_get(dev, "ps8640-1v2");
+	if (IS_ERR(ps_bridge->pwr_1v2_supply)) {
+		dev_err(dev, "cannot get ps_bridge->pwr_1v2_supply\n");
+		return PTR_ERR(ps_bridge->pwr_1v2_supply);
+	}
+
+	ps_bridge->gpio_mode_sel_n = devm_gpiod_get(&client->dev, "mode-sel",
+						    GPIOD_OUT_HIGH);
+	if (IS_ERR(ps_bridge->gpio_mode_sel_n)) {
+		ret = PTR_ERR(ps_bridge->gpio_mode_sel_n);
+		DRM_ERROR("cannot get gpio_mode_sel_n %d\n", ret);
+		return ret;
+	}
+
+	ret = gpiod_direction_output(ps_bridge->gpio_mode_sel_n, 1);
+	if (ret) {
+		DRM_ERROR("cannot configure gpio_mode_sel_n\n");
+		return ret;
+	}
+
+	ps_bridge->gpio_pwr_n = devm_gpiod_get(&client->dev, "power",
+					       GPIOD_OUT_HIGH);
+	if (IS_ERR(ps_bridge->gpio_pwr_n)) {
+		ret = PTR_ERR(ps_bridge->gpio_pwr_n);
+		DRM_ERROR("cannot get gpio_pwr_n %d\n", ret);
+		return ret;
+	}
+
+	ret = gpiod_direction_output(ps_bridge->gpio_pwr_n, 1);
+	if (ret) {
+		DRM_ERROR("cannot configure gpio_pwr_n\n");
+		return ret;
+	}
+
+	ps_bridge->gpio_rst_n = devm_gpiod_get(&client->dev, "reset",
+					       GPIOD_OUT_HIGH);
+	if (IS_ERR(ps_bridge->gpio_rst_n)) {
+		ret = PTR_ERR(ps_bridge->gpio_rst_n);
+		DRM_ERROR("cannot get gpio_rst_n %d\n", ret);
+		return ret;
+	}
+
+	ret = gpiod_direction_output(ps_bridge->gpio_rst_n, 1);
+	if (ret) {
+		DRM_ERROR("cannot configure gpio_rst_n\n");
+		return ret;
+	}
+
+	ret = of_property_read_u32(dev->of_node, "reg", &temp_reg);
+	if (ret) {
+		DRM_ERROR("Can't read base_reg value\n");
+		return ret;
+	}
+	ps_bridge->base_reg = temp_reg;
+
+	ps_bridge->bridge.funcs = &ps8640_bridge_funcs;
+	ps_bridge->bridge.of_node = dev->of_node;
+	ret = drm_bridge_add(&ps_bridge->bridge);
+	if (ret) {
+		DRM_ERROR("Failed to add bridge\n");
+		return ret;
+	}
+
+	i2c_set_clientdata(client, ps_bridge);
+
+	return 0;
+}
+
+static int ps8640_remove(struct i2c_client *client)
+{
+	struct ps8640 *ps_bridge = i2c_get_clientdata(client);
+
+	drm_bridge_remove(&ps_bridge->bridge);
+
+	return 0;
+}
+
+static const struct i2c_device_id ps8640_i2c_table[] = {
+	{"parade,ps8640", 0},
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, ps8640_i2c_table);
+
+static const struct of_device_id ps8640_match[] = {
+	{ .compatible = "parade,ps8640" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, ps8640_match);
+
+static struct i2c_driver ps8640_driver = {
+	.id_table = ps8640_i2c_table,
+	.probe = ps8640_probe,
+	.remove = ps8640_remove,
+	.driver = {
+		.name = "parade,ps8640",
+		.owner = THIS_MODULE,
+		.of_match_table = ps8640_match,
+	},
+};
+module_i2c_driver(ps8640_driver);
+
+MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
+MODULE_AUTHOR("CK Hu <ck.hu@mediatek.com>");
+MODULE_DESCRIPTION("PARADE ps8640 DSI-eDP converter driver");
+MODULE_LICENSE("GPL v2");
-- 
1.7.9.5

[PATCH] drm/bridge: fix platform_no_drv_owner.cocci warnings

[kbuild test robot]

drivers/gpu/drm/bridge/parade-ps8640.c:480:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

CC: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

 parade-ps8640.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/gpu/drm/bridge/parade-ps8640.c
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -477,7 +477,6 @@ static struct i2c_driver ps8640_driver =
 	.remove = ps8640_remove,
 	.driver = {
 		.name = "parade,ps8640",
-		.owner = THIS_MODULE,
 		.of_match_table = ps8640_match,
 	},
 };