From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= Subject: [PATCH v8 03/12] ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi Date: Tue, 1 May 2018 14:31:22 +0200 Message-ID: <20180501123131.7738-4-mylene.josserand@bootlin.com> References: <20180501123131.7738-1-mylene.josserand@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20180501123131.7738-1-mylene.josserand@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: linux@armlinux.org.uk, maxime.ripard@bootlin.com, wens@csie.org, marc.zyngier@arm.com, mark.rutland@arm.com, robh+dt@kernel.org, horms@verge.net.au, geert@linux-m68k.org, magnus.damm@gmail.com Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, clabbe.montjoie@gmail.com, quentin.schulz@bootlin.com, thomas.petazzoni@bootlin.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mylene.josserand@bootlin.com List-Id: devicetree@vger.kernel.org As we found in sun9i-a80, CPUCFG is a collection of registers that are mapped to the SoC's signals from each individual processor core and associated peripherals. These registers are used for SMP bringup and CPU hotplugging. Signed-off-by: Mylène Josserand Reviewed-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 379981389eea..a50ccb475de8 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -349,6 +349,11 @@ }; }; + cpucfg@1700000 { + compatible = "allwinner,sun8i-a83t-cpucfg"; + reg = <0x01700000 0x400>; + }; + syscon: syscon@1c00000 { compatible = "allwinner,sun8i-a83t-system-controller", "syscon"; -- 2.11.0