From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH 6/7] arm64: allwinner: h6: add R_I2C controller Date: Fri, 4 May 2018 17:12:06 +0200 Message-ID: <20180504151206.c6oi7vtaskg4sbys@flea> References: <20180503183847.11046-1-icenowy@aosc.io> <20180503183847.11046-7-icenowy@aosc.io> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="e4pavb2hql2yh5gb" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20180503183847.11046-7-icenowy-h8G6r0blFSE@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng Cc: Rob Herring , Chen-Yu Tsai , Linus Walleij , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --e4pavb2hql2yh5gb Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Fri, May 04, 2018 at 02:38:46AM +0800, Icenowy Zheng wrote: > Allwinner H6 SoC has a R_I2C controller wired to the PL0/PL1 pins, which > are used in the reference design to connect AXP805 PMIC. > > Add support for it. > > Signed-off-by: Icenowy Zheng Dropped the headers (that should have been in your previous patch to maintain the bisectability) and changed for indices, and applied. Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com --e4pavb2hql2yh5gb--