From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rui Miguel Silva Subject: [PATCH v3 09/14] ARM: dts: imx7s: add multiplexer controls Date: Mon, 7 May 2018 17:21:47 +0100 Message-ID: <20180507162152.2545-10-rui.silva@linaro.org> References: <20180507162152.2545-1-rui.silva@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180507162152.2545-1-rui.silva@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" To: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , Rui Miguel Silva , Fabio Estevam , Shawn Guo , linux-media@vger.kernel.org List-Id: devicetree@vger.kernel.org The IOMUXC General Purpose Register has bitfield to control video bus multiplexer to control the CSI input between the MIPI-CSI2 and parallel interface. Add that register and mask. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 67450ad89940..3590dab529f9 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -520,8 +520,14 @@ gpr: iomuxc-gpr@30340000 { compatible = "fsl,imx7d-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd"; reg = <0x30340000 0x10000>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x14 0x00000010>; + }; }; ocotp: ocotp-ctrl@30350000 { -- 2.17.0