From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manivannan Sadhasivam Subject: Re: [PATCH 3/3] pinctrl: actions: Add interrupt support for OWL S900 SoC Date: Sun, 3 Jun 2018 22:27:23 +0530 Message-ID: <20180603165723.GA14907@Mani-XPS-13-9360> References: <20180602165415.30956-1-manivannan.sadhasivam@linaro.org> <20180602165415.30956-4-manivannan.sadhasivam@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Andy Shevchenko Cc: Linus Walleij , Rob Herring , Andreas =?iso-8859-1?Q?F=E4rber?= , =?utf-8?B?5YiY54Kc?= , mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree , Daniel Thompson , amit.kucheria@linaro.org, linux-arm Mailing List , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , hzhang@ucrobotics.com, bdong@ucrobotics.com, Mani Sadhasivam , Thomas Liau , jeff.chen@actions-semi.com List-Id: devicetree@vger.kernel.org Hi Andy, On Sun, Jun 03, 2018 at 11:37:53AM +0300, Andy Shevchenko wrote: > On Sat, Jun 2, 2018 at 7:54 PM, Manivannan Sadhasivam > wrote: > > Add interrupt support for Actions Semi OWL S900 SoC. > > > + port = owl_gpio_get_port(pctrl, &gpio); > > + if (WARN_ON(port == NULL)) > > + return; > > At which circumstances the above possible? > Only possible when the requested GPIO exceeds chip->ngpio. I know it is a kind of redundant check, but it is good to have this during development. > > + port = owl_gpio_get_port(pctrl, &gpio); > > + if (WARN_ON(port == NULL)) > > + return; > > Ditto. > Same as above. > > + port = owl_gpio_get_port(pctrl, &gpio); > > + if (WARN_ON(port == NULL)) > > + return; > > Ditto. > Same as above. > > + port = owl_gpio_get_port(pctrl, &gpio); > > + if (WARN_ON(port == NULL)) > > + return -ENODEV; > > Ditto. > Same as above. > > > + for (i = 0; i < chip->ngpio; i++) { > > + irqno = irq_create_mapping(pctrl->domain, i); > > + irq_set_chip_and_handler(irqno, &owl_gpio_irq_chip, > > + handle_edge_irq); > > + irq_set_chip_data(irqno, pctrl); > > + } > > I'm not sure the handle_edge_irq() is a correct handler here. It would > be handle_bad_irq() until IRQ has been requested properly. > No? > Hmmm, good question. Since the handler used in irq_set_chip_and_handler is superseded by irq_set_chained_handler_and_data, this doesn't matter anyway. But I would like to hear what Linus suggests here! > > +/* GPIO TYPE Bit Definition */ > > +#define OWL_GPIO_INT_LEVEL_HIGH 0 > > +#define OWL_GPIO_INT_LEVEL_LOW 1 > > +#define OWL_GPIO_INT_EDGE_RISING 2 > > +#define OWL_GPIO_INT_EDGE_FALLING 3 > > > +#define OWL_GPIO_INT_MASK 3 > > GENMASK? > Ack. Thanks, Mani > -- > With Best Regards, > Andy Shevchenko