devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 0/8] Tegra20 External Memory Controller driver
Date: Sun, 17 Jun 2018 17:55:31 +0300	[thread overview]
Message-ID: <20180617145539.4758-1-digetx@gmail.com> (raw)

Hello,

Couple years ago the Tegra20 EMC driver was removed from the kernel
due to incompatible changes in the Tegra's clock driver. This patchset
introduces a modernized EMC driver. Currently the sole purpose of the
driver is to initialize DRAM frequency to maximum rate during of the
kernels boot-up. Later we may consider implementing dynamic memory
frequency scaling, utilizing functionality provided by this driver.

Changelog:

v3:
	- Handle "nvidia,use-ram-code" DT property, its handling was missed
	  in the previous versions.

	- Honor "emc-tables" DT node naming which is explicitly specified
	  in the DT binding, also was missed in the previous versions.

	- Two new DT binding patches: one adds the EMC clock property,
	  other relocates the binding doc file to the appropriate directory.
	  One new patch that adds EMC clock property to the DTS file.

	- Addressed v2 review comments from Thierry Reding. Driver does not
	  preserve backwards compatibility with older device tree binding.

	- The PLL_M and PLL_P clocks are kept internal to the driver because
	  after some more considering I couldn't find a really good reason why
	  these clocks should be in the device tree.

	- Some minor cleanups and fixes in the drivers code.

v2:
	- Minor code cleanups like consistent use of writel_relaxed instead
	  of non-relaxed version, reworded error messages, etc.

	- Factored out use_pllm_ud bit checking into a standalone patch for
	  consistency.

Dmitry Osipenko (8):
  dt: bindings: tegra20-emc: Document interrupt property
  dt: bindings: tegra20-emc: Document clock property
  dt: bindings: Move tegra20-emc binding to memory-controllers directory
  ARM: dts: tegra20: Add interrupt entry to External Memory Controller
  ARM: dts: tegra20: Add clock entry to External Memory Controller
  clk: tegra20: Turn EMC clock gate into divider
  clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC
  memory: tegra: Introduce Tegra20 EMC driver

 .../nvidia,tegra20-emc.txt                    |   4 +
 arch/arm/boot/dts/tegra20.dtsi                |   2 +
 drivers/clk/tegra/clk-tegra20.c               |  46 +-
 drivers/memory/tegra/Kconfig                  |  10 +
 drivers/memory/tegra/Makefile                 |   1 +
 drivers/memory/tegra/tegra20-emc.c            | 574 ++++++++++++++++++
 6 files changed, 627 insertions(+), 10 deletions(-)
 rename Documentation/devicetree/bindings/{arm/tegra => memory-controllers}/nvidia,tegra20-emc.txt (95%)
 create mode 100644 drivers/memory/tegra/tegra20-emc.c

-- 
2.17.1

             reply	other threads:[~2018-06-17 14:55 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-17 14:55 Dmitry Osipenko [this message]
2018-06-17 14:55 ` [PATCH v3 1/8] dt: bindings: tegra20-emc: Document interrupt property Dmitry Osipenko
2018-06-17 14:55 ` [PATCH v3 2/8] dt: bindings: tegra20-emc: Document clock property Dmitry Osipenko
2018-06-20 18:23   ` Rob Herring
2018-06-17 14:55 ` [PATCH v3 3/8] dt: bindings: Move tegra20-emc binding to memory-controllers directory Dmitry Osipenko
2018-06-20 18:24   ` Rob Herring
2018-06-17 14:55 ` [PATCH v3 4/8] ARM: dts: tegra20: Add interrupt entry to External Memory Controller Dmitry Osipenko
2018-06-17 14:55 ` [PATCH v3 5/8] ARM: dts: tegra20: Add clock " Dmitry Osipenko
2018-06-17 14:55 ` [PATCH v3 6/8] clk: tegra20: Turn EMC clock gate into divider Dmitry Osipenko
2018-07-09  0:00   ` Stephen Boyd
2018-07-09 11:52     ` Dmitry Osipenko
2018-06-17 14:55 ` [PATCH v3 7/8] clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC Dmitry Osipenko
2018-06-17 14:55 ` [PATCH v3 8/8] memory: tegra: Introduce Tegra20 EMC driver Dmitry Osipenko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180617145539.4758-1-digetx@gmail.com \
    --to=digetx@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jonathanh@nvidia.com \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=pdeschrijver@nvidia.com \
    --cc=pgaikwad@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).