From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Haim Boot <hayim@marvell.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Hanna Hawa <hannah@marvell.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Rob Herring <robh+dt@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 06/17] irqchip/irq-mvebu-icu: switch to regmap
Date: Fri, 22 Jun 2018 17:14:21 +0200 [thread overview]
Message-ID: <20180622151432.1566-7-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20180622151432.1566-1-miquel.raynal@bootlin.com>
Before splitting the code to support multiple platform devices to
be probed (one for the ICU, one per interrupt group), let's switch to
regmap first by creating one in the ->probe().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/irqchip/irq-mvebu-icu.c | 45 +++++++++++++++++++++++++++--------------
1 file changed, 30 insertions(+), 15 deletions(-)
diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
index 0f2655d7f19e..3694c0d73c0d 100644
--- a/drivers/irqchip/irq-mvebu-icu.c
+++ b/drivers/irqchip/irq-mvebu-icu.c
@@ -18,6 +18,8 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
#include <dt-bindings/interrupt-controller/mvebu-icu.h>
@@ -38,7 +40,7 @@
struct mvebu_icu {
struct irq_chip irq_chip;
- void __iomem *base;
+ struct regmap *regmap;
struct irq_domain *domain;
struct device *dev;
atomic_t initialized;
@@ -56,10 +58,10 @@ static void mvebu_icu_init(struct mvebu_icu *icu, struct msi_msg *msg)
return;
/* Set Clear/Set ICU SPI message address in AP */
- writel_relaxed(msg[0].address_hi, icu->base + ICU_SETSPI_NSR_AH);
- writel_relaxed(msg[0].address_lo, icu->base + ICU_SETSPI_NSR_AL);
- writel_relaxed(msg[1].address_hi, icu->base + ICU_CLRSPI_NSR_AH);
- writel_relaxed(msg[1].address_lo, icu->base + ICU_CLRSPI_NSR_AL);
+ regmap_write(icu->regmap, ICU_SETSPI_NSR_AH, msg[0].address_hi);
+ regmap_write(icu->regmap, ICU_SETSPI_NSR_AL, msg[0].address_lo);
+ regmap_write(icu->regmap, ICU_CLRSPI_NSR_AH, msg[1].address_hi);
+ regmap_write(icu->regmap, ICU_CLRSPI_NSR_AL, msg[1].address_lo);
}
static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
@@ -82,7 +84,7 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
icu_int = 0;
}
- writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
+ regmap_write(icu->regmap, ICU_INT_CFG(d->hwirq), icu_int);
/*
* The SATA unit has 2 ports, and a dedicated ICU entry per
@@ -94,10 +96,10 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
* configured (regardless of which port is actually in use).
*/
if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
- writel_relaxed(icu_int,
- icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
- writel_relaxed(icu_int,
- icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
+ regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA0_ICU_ID),
+ icu_int);
+ regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA1_ICU_ID),
+ icu_int);
}
}
@@ -204,12 +206,20 @@ static const struct irq_domain_ops mvebu_icu_domain_ops = {
.free = mvebu_icu_irq_domain_free,
};
+static struct regmap_config mvebu_icu_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .name = "mvebu_icu",
+};
+
static int mvebu_icu_probe(struct platform_device *pdev)
{
struct mvebu_icu *icu;
struct device_node *node = pdev->dev.of_node;
struct device_node *gicp_dn;
struct resource *res;
+ void __iomem *regs;
int i;
icu = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_icu),
@@ -220,12 +230,17 @@ static int mvebu_icu_probe(struct platform_device *pdev)
icu->dev = &pdev->dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- icu->base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(icu->base)) {
+ regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(regs)) {
dev_err(&pdev->dev, "Failed to map icu base address.\n");
- return PTR_ERR(icu->base);
+ return PTR_ERR(regs);
}
+ icu->regmap = devm_regmap_init_mmio(icu->dev, regs,
+ &mvebu_icu_regmap_config);
+ if (IS_ERR(icu->regmap))
+ return PTR_ERR(icu->regmap);
+
icu->irq_chip.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
"ICU.%x",
(unsigned int)res->start);
@@ -260,11 +275,11 @@ static int mvebu_icu_probe(struct platform_device *pdev)
for (i = 0 ; i < ICU_MAX_IRQS ; i++) {
u32 icu_int, icu_grp;
- icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i));
+ regmap_read(icu->regmap, ICU_INT_CFG(i), &icu_int);
icu_grp = icu_int >> ICU_GROUP_SHIFT;
if (icu_grp == ICU_GRP_NSR)
- writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));
+ regmap_write(icu->regmap, ICU_INT_CFG(i), 0);
}
icu->domain =
--
2.14.1
next prev parent reply other threads:[~2018-06-22 15:14 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 15:14 [PATCH v3 00/17] Add System Error Interrupt support to Armada SoCs Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 01/17] platform-msi: allow creation of MSI domain without interrupt number Miquel Raynal
2018-06-28 11:12 ` Marc Zyngier
2018-06-29 7:40 ` Miquel Raynal
2018-06-29 14:38 ` Marc Zyngier
2018-06-29 14:43 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 02/17] dt-bindings/interrupt-controller: fix Marvell ICU length in the example Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 03/17] arm64: dts: marvell: fix CP110 ICU node size Miquel Raynal
2018-06-25 15:05 ` Gregory CLEMENT
2018-06-25 15:09 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 04/17] irqchip/irq-mvebu-icu: fix wrong private data retrieval Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 05/17] irqchip/irq-mvebu-icu: clarify the reset operation of configured interrupts Miquel Raynal
2018-06-22 15:14 ` Miquel Raynal [this message]
2018-06-28 12:05 ` [PATCH v3 06/17] irqchip/irq-mvebu-icu: switch to regmap Marc Zyngier
2018-06-29 15:27 ` Miquel Raynal
2018-06-29 17:17 ` Marc Zyngier
2018-06-29 18:20 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 07/17] irqchip/irq-mvebu-icu: make irq_domain local Miquel Raynal
2018-06-28 12:10 ` Marc Zyngier
2018-06-29 12:32 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 08/17] irqchip/irq-mvebu-icu: disociate ICU and NSR Miquel Raynal
2018-06-28 12:24 ` Marc Zyngier
2018-06-29 12:30 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 09/17] irqchip/irq-mvebu-icu: support ICU subnodes Miquel Raynal
2018-06-28 12:45 ` Marc Zyngier
2018-06-29 12:34 ` Miquel Raynal
2018-07-04 9:09 ` Miquel Raynal
2018-07-04 12:43 ` Marc Zyngier
2018-07-04 15:16 ` Miquel Raynal
2018-07-05 8:19 ` Marc Zyngier
2018-06-22 15:14 ` [PATCH v3 10/17] irqchip/irq-mvebu-sei: add new driver for Marvell SEI Miquel Raynal
2018-06-28 14:54 ` Marc Zyngier
2018-06-29 12:41 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 11/17] arm64: marvell: enable SEI driver Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 12/17] irqchip/irq-mvebu-icu: add support for System Error Interrupts (SEI) Miquel Raynal
2018-06-28 16:49 ` Marc Zyngier
2018-06-28 17:12 ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 13/17] dt-bindings/interrupt-controller: update Marvell ICU bindings Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 14/17] dt-bindings/interrupt-controller: add documentation for Marvell SEI controller Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 15/17] arm64: dts: marvell: add AP806 SEI subnode Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 16/17] arm64: dts: marvell: use new bindings for CP110 interrupts Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 17/17] arm64: dts: marvell: add CP110 ICU SEI subnode Miquel Raynal
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