From mboxrd@z Thu Jan  1 00:00:00 1970
From: Baruch Siach <baruch@tkos.co.il>
Subject: Re: [PATCH v2 06/23] thermal: armada: convert driver to syscon
 register accesses
Date: Tue, 26 Jun 2018 06:37:24 +0300
Message-ID: <20180626033724.q7radxgjeqtsl7ae@tarshish>
References: <20180625151239.20976-1-miquel.raynal@bootlin.com>
 <20180625151239.20976-7-miquel.raynal@bootlin.com>
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To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>, Jason Cooper <jason@lakedaemon.net>, Nadav Haklai <nadavh@marvell.com>, devicetree@vger.kernel.org, Antoine Tenart <antoine.tenart@bootlin.com>, Catalin Marinas <catalin.marinas@arm.com>, Gregory Clement <gregory.clement@bootlin.com>, linux-pm@vger.kernel.org, Will Deacon <will.deacon@arm.com>, Rob Herring <robh+dt@kernel.org>, Maxime Chevallier <maxime.chevallier@bootlin.com>, Eduardo Valentin <edubezval@gmail.com>, David Sniatkiwicz <davidsn@marvell.com>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Zhang Rui <rui.zhang@intel.com>, linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
List-Id: devicetree@vger.kernel.org

Hi Miquel,

On Mon, Jun 25, 2018 at 05:12:22PM +0200, Miquel Raynal wrote:
> Until recently, only one register was referenced in MVEBU thermal IP
> node. Recent changes added a second entry pointing to another
> register right next to it. We cannot know for sure that we will not
> have to access other registers. That will be actually the case when
> overheat interrupt feature will come, where it will be needed to access
> DFX registers in the same area.
> 
> This approach is not scalable so intead of adding consinuously memory
> areas in the DT (and change de DT bindings, while keeping backward

s/de/the/

> compatibility), move the thermal node into a wider syscon from which it
> will be possible to also configure the thermal interrupt.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

baruch

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