From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vignesh R Subject: [PATCH v2 1/4] dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode Date: Wed, 27 Jun 2018 17:59:16 +0530 Message-ID: <20180627122919.23926-2-vigneshr@ti.com> References: <20180627122919.23926-1-vigneshr@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20180627122919.23926-1-vigneshr@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: Tony Lindgren , Rob Herring , Kishon Vijay Abraham I , Lorenzo Pieralisi Cc: Bjorn Helgaas , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Vignesh R List-Id: devicetree@vger.kernel.org Update device tree binding documentation of TI's dra7xx PCI controller for enabling unaligned mem access as applicable not just in EP mode but in host mode as well. Signed-off-by: Vignesh R Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt index 7f7af3044016..452fe48c4fdd 100644 --- a/Documentation/devicetree/bindings/pci/ti-pci.txt +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt @@ -26,6 +26,11 @@ HOST MODE ranges, interrupt-map-mask, interrupt-map : as specified in ../designware-pcie.txt + - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument + should contain the register offset within syscon + and the 2nd argument should contain the bit field + for setting the bit to enable unaligned + access. DEVICE MODE =========== -- 2.18.0