From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH] ARM: dts: sun8i-h3: Increase the GPU clock to 576 MHz Date: Wed, 27 Jun 2018 22:08:12 +0200 Message-ID: <20180627200812.usm5ndoyrnmuhjrv@flea> References: <20180627072635.3592-1-paul.kocialkowski@bootlin.com> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="zd3omamzv4izpv2n" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20180627072635.3592-1-paul.kocialkowski-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Paul Kocialkowski Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , Mark Rutland , Chen-Yu Tsai , linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Thomas Petazzoni , Qiang Yu , Giulio Benetti , Jagan Teki List-Id: devicetree@vger.kernel.org --zd3omamzv4izpv2n Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Wed, Jun 27, 2018 at 09:26:35AM +0200, Paul Kocialkowski wrote: > It was reported (based on declarations from the Allwiner BSP) that the > Mali 400 found on the H3 can be clocked up to 576 MHz. > > The frequency was tested using the r6p2 out-of-tree driver and a Kodi > userspace with associated r6p2 blobs, leading to a working result. > > This increases the clock to 576 MHz, which directly increases the pixel > throughput of the GPU (given the 1 pixel-per-cycle rate). > > Signed-off-by: Paul Kocialkowski > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > index 41d57c76f290..a14a63092dc6 100644 > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > @@ -133,7 +133,7 @@ > resets = <&ccu RST_BUS_GPU>; > > assigned-clocks = <&ccu CLK_GPU>; > - assigned-clock-rates = <384000000>; > + assigned-clock-rates = <576000000>; This should really be fixed through the driver or through OPPs, instead of just coding it here and hoping that it will remain set to that rate. Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com --zd3omamzv4izpv2n--