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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>,
	Jason Cooper <jason@lakedaemon.net>,
	devicetree@vger.kernel.org,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Haim Boot <hayim@marvell.com>, Will Deacon <will.deacon@arm.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Hanna Hawa <hannah@marvell.com>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH v3 01/17] platform-msi: allow creation of MSI domain without interrupt number
Date: Fri, 29 Jun 2018 09:40:35 +0200	[thread overview]
Message-ID: <20180629094035.5199fe89@xps13> (raw)
In-Reply-To: <c5b38c34-5ba0-6545-3635-45be1858fa3b@arm.com>

Hi Marc,

Marc Zyngier <marc.zyngier@arm.com> wrote on Thu, 28 Jun 2018 12:12:04
+0100:

> On 22/06/18 16:14, Miquel Raynal wrote:
> > platform_msi_alloc_priv_data() checks that a number of interrupts is
> > always given. This extra-check has no real impact and just prevents
> > uselessly the user to create an MSI tree domain: remove it.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  drivers/base/platform-msi.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c
> > index 60d6cc618f1c..9f001f4ccc0f 100644
> > --- a/drivers/base/platform-msi.c
> > +++ b/drivers/base/platform-msi.c
> > @@ -203,7 +203,7 @@ platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec,
> >  	 * accordingly (which would impact the max number of MSI
> >  	 * capable devices).
> >  	 */
> > -	if (!dev->msi_domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS)
> > +	if (!dev->msi_domain || !write_msi_msg || nvec > MAX_DEV_MSIS)
> >  		return ERR_PTR(-EINVAL);
> >  
> >  	if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) {
> >   
> 
> Huh... It's not that simple.
> 
> Yes, it allows you to get a tree via platform_msi_create_device_domain
> (assuming that's why you're changing it -- your commit message doesn't
> say much)

Indeed. That was exactly my intention.

> but it also has some impact on the way msi_domain_prepare_irqs
> works (see how it is called from platform_msi_create_device_domain).
> 
> Importantly, the msi_prepare callback takes nvec as a parameter, and
> that ends up trickling down to the irqchip, or whatever will setup the
> MSI domain. Things like the GICv3 ITS do rely on that to carve out the
> LPI space that subsequently gets used to populate the domain.
> 
> So no, you can't do it like that. If you really want a tree, add a
> helper that does so.

So if I understand correctly, what should be done is writting a new
helper that would do something similar to
platform_msi_create_device_domain(), but creating instead a tree domain
and still giving msi_domain_prepare_irqs() a meaningful number (as
nvec) that would be the maximum number of MSIs that could be allocated.
Am I right here?


Thanks,
Miquèl

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  reply	other threads:[~2018-06-29  7:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-22 15:14 [PATCH v3 00/17] Add System Error Interrupt support to Armada SoCs Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 01/17] platform-msi: allow creation of MSI domain without interrupt number Miquel Raynal
2018-06-28 11:12   ` Marc Zyngier
2018-06-29  7:40     ` Miquel Raynal [this message]
2018-06-29 14:38       ` Marc Zyngier
2018-06-29 14:43         ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 02/17] dt-bindings/interrupt-controller: fix Marvell ICU length in the example Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 03/17] arm64: dts: marvell: fix CP110 ICU node size Miquel Raynal
2018-06-25 15:05   ` Gregory CLEMENT
2018-06-25 15:09     ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 04/17] irqchip/irq-mvebu-icu: fix wrong private data retrieval Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 05/17] irqchip/irq-mvebu-icu: clarify the reset operation of configured interrupts Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 06/17] irqchip/irq-mvebu-icu: switch to regmap Miquel Raynal
2018-06-28 12:05   ` Marc Zyngier
2018-06-29 15:27     ` Miquel Raynal
2018-06-29 17:17       ` Marc Zyngier
2018-06-29 18:20         ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 07/17] irqchip/irq-mvebu-icu: make irq_domain local Miquel Raynal
2018-06-28 12:10   ` Marc Zyngier
2018-06-29 12:32     ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 08/17] irqchip/irq-mvebu-icu: disociate ICU and NSR Miquel Raynal
2018-06-28 12:24   ` Marc Zyngier
2018-06-29 12:30     ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 09/17] irqchip/irq-mvebu-icu: support ICU subnodes Miquel Raynal
2018-06-28 12:45   ` Marc Zyngier
2018-06-29 12:34     ` Miquel Raynal
2018-07-04  9:09     ` Miquel Raynal
2018-07-04 12:43       ` Marc Zyngier
2018-07-04 15:16         ` Miquel Raynal
2018-07-05  8:19           ` Marc Zyngier
2018-06-22 15:14 ` [PATCH v3 10/17] irqchip/irq-mvebu-sei: add new driver for Marvell SEI Miquel Raynal
2018-06-28 14:54   ` Marc Zyngier
2018-06-29 12:41     ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 11/17] arm64: marvell: enable SEI driver Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 12/17] irqchip/irq-mvebu-icu: add support for System Error Interrupts (SEI) Miquel Raynal
2018-06-28 16:49   ` Marc Zyngier
2018-06-28 17:12     ` Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 13/17] dt-bindings/interrupt-controller: update Marvell ICU bindings Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 14/17] dt-bindings/interrupt-controller: add documentation for Marvell SEI controller Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 15/17] arm64: dts: marvell: add AP806 SEI subnode Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 16/17] arm64: dts: marvell: use new bindings for CP110 interrupts Miquel Raynal
2018-06-22 15:14 ` [PATCH v3 17/17] arm64: dts: marvell: add CP110 ICU SEI subnode Miquel Raynal

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