From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 6/9] dt-bindings: phy: add binding for Allwinner USB3 PHY Date: Wed, 11 Jul 2018 10:13:56 -0600 Message-ID: <20180711161356.GA4685@rob-hp-laptop> References: <20180706153805.25842-1-icenowy@aosc.io> <20180706153805.25842-7-icenowy@aosc.io> Reply-To: robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20180706153805.25842-7-icenowy-h8G6r0blFSE@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng Cc: Maxime Ripard , Chen-Yu Tsai , Kishon Vijay Abraham I , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org On Fri, Jul 06, 2018 at 11:38:02PM +0800, Icenowy Zheng wrote: > The new Allwinner H6 SoC contains a USB3 PHY that is wired to the > external USB3 pins of the SoC. > > Add a device tree binding for the PHY. > > Signed-off-by: Icenowy Zheng > --- > Splitted from the PHY driver patch in v1. > > .../bindings/phy/sun50i-usb3-phy.txt | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt > new file mode 100644 > index 000000000000..912d55f9f69d > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt > @@ -0,0 +1,24 @@ > +Allwinner sun50i USB3 PHY > +----------------------- > + > +Required properties: > +- compatible : should be one of > + * allwinner,sun60i-h6-usb3-phy > +- reg : a list of offset + length pairs > +- #phy-cells : from the generic phy bindings, must be 0 > +- clocks : phandle + clock specifier for the phy clock > +- resets : phandle + reset specifier for the phy reset > + > +Optional Properties: > +- phy-supply : from the generic phy bindings, a phandle to a regulator that > + provides power to VBUS. Power to the phy or Vbus? If the latter only, then this property should be elsewhere (like a connector node). > + > +Example: > + usb3phy: phy@5210000 { > + compatible = "allwinner,sun50i-h6-usb3-phy"; > + reg = <0x5210000 0x10000>; > + clocks = <&ccu CLK_USB_PHY1>; > + resets = <&ccu RST_USB_PHY1>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > -- > 2.17.1 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > More majordomo info at http://vger.kernel.org/majordomo-info.html