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From: Aapo Vienamo <avienamo@nvidia.com>
To: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 5/7] dt-bindings: Add Tegra PMC pad configuration bindings
Date: Tue, 17 Jul 2018 18:30:20 +0300	[thread overview]
Message-ID: <20180717183020.5ab9bfa6@dhcp-10-21-25-168> (raw)
In-Reply-To: <CAL_JsqL1F0RF_6=ho0pa7Uh4AUsyvFRDGM50gN4=6_+MwBfGYQ@mail.gmail.com>

On Tue, 17 Jul 2018 08:22:07 -0600
Rob Herring <robh@kernel.org> wrote:

> On Tue, Jul 17, 2018 at 6:23 AM Aapo Vienamo <avienamo@nvidia.com> wrote:
> >
> > On Mon, 16 Jul 2018 09:43:09 -0600
> > Rob Herring <robh@kernel.org> wrote:
> >  
> > > On Thu, Jul 12, 2018 at 03:00:11PM +0300, Aapo Vienamo wrote:  
> > > > Document the pinctrl bindings used by the PMC driver for performing pad
> > > > configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
> > > > are modified as they both cover SoC generations for which these bindings
> > > > apply.
> > > >
> > > > Add a header defining Tegra PMC pad voltage configurations.
> > > >
> > > > Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> > > > Acked-by: Jon Hunter <jonathanh@nvidia.com>
> > > > ---
> > > >  .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
> > > >  .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
> > > >  include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
> > > >  3 files changed, 197 insertions(+)
> > > >  create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > index 5a3bf7c..9528f41 100644
> > > > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > @@ -34,3 +34,87 @@ Board DTS:
> > > >     pmc@c360000 {
> > > >             nvidia,invert-interrupt;
> > > >     };
> > > > +
> > > > +== Pad Control Nodes ==
> > > > +
> > > > +The PMC can be used to set pad power state and voltage configuration.
> > > > +The pad configuration is done via the pinctrl framework. The driver
> > > > +implements power-source, low-power-enable, and low-power-disable pinconf
> > > > +pin configuration node properties. Each pinctrl pin corresponds to a
> > > > +single Tegra PMC pad. Thus, in the following sections of this document
> > > > +pin refers to the pinctrl frameworks notion of a Tegra PMC pad.  
> > >
> > > "pinctrl framework" is Linux specific and doesn't belong in the binding.
> > > Neither does what a driver supports. Describe what the h/w supports.
> > >  
> > > > +
> > > > +The pad configuration state nodes are placed under the pmc node and they
> > > > +are referred to by the pinctrl client device properties. For more  
> > >
> > > Another driver detail not relevant.
> > >  
> > > > +information see the examples presented later and  
> > >
> > > examples don't document bindings. The documentation should be complete
> > > without examples.
> > >  
> > > > +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> > > > +
> > > > +The values accepted by power-source property are
> > > > +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> > > > +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.  
> > >
> > > You need to list out what properties the child nodes can have.
> > >
> > > power-source needs a vendor prefix.  
> >
> > Isn't it a generic pinctrl property?  
> 
> I don't know offhand. Doesn't look like it if you have custom values.

It's listed under "Supported generic properties" in
pinctrl-bindings.txt. The convention seems to be not to add a vendor
prefix even though such custom macro values are used. The property is
currently used by qcom,pmic-gpio, qcom,pmic-mpp, and renesas,pfc-pinctrl.
I could not find a bindings document describing it with a vendor prefix.

 -Aapo

  reply	other threads:[~2018-07-17 15:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-12 12:00 [PATCH v3 0/7] Tegra PMC pinctrl pad configuration Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 1/7] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 2/7] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 3/7] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 4/7] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 5/7] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-07-16 15:43   ` Rob Herring
2018-07-17 12:23     ` Aapo Vienamo
2018-07-17 14:22       ` Rob Herring
2018-07-17 15:30         ` Aapo Vienamo [this message]
2018-07-20 11:16           ` Jon Hunter
2018-07-29 20:54             ` Linus Walleij
2018-07-12 12:00 ` [PATCH v3 6/7] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo
2018-07-12 12:00 ` [PATCH v3 7/7] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-07-12 13:01   ` Jon Hunter

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