From: Quentin Schulz <quentin.schulz@bootlin.com>
To: alexandre.belloni@bootlin.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org,
linux-mips@linux-mips.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
Quentin Schulz <quentin.schulz@bootlin.com>
Subject: [PATCH] MIPS: mscc: ocelot: fix length of memory address space for MIIM
Date: Wed, 25 Jul 2018 14:21:32 +0200 [thread overview]
Message-ID: <20180725122132.31187-1-quentin.schulz@bootlin.com> (raw)
The length of memory address space for MIIM0 is from 0x7107009c to
0x710700bf included which is 36 bytes long in decimal, or 0x24 bytes in
hexadecimal and not 0x36.
Fixes: 49b031690abe ("MIPS: mscc: Add switch to ocelot")
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
---
arch/mips/boot/dts/mscc/ocelot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index 4f33dbc67348..7096915f26e0 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -184,7 +184,7 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "mscc,ocelot-miim";
- reg = <0x107009c 0x36>, <0x10700f0 0x8>;
+ reg = <0x107009c 0x24>, <0x10700f0 0x8>;
interrupts = <14>;
status = "disabled";
--
2.14.1
next reply other threads:[~2018-07-25 12:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-25 12:21 Quentin Schulz [this message]
2018-07-25 12:32 ` [PATCH] MIPS: mscc: ocelot: fix length of memory address space for MIIM Alexandre Belloni
2018-07-26 17:41 ` Paul Burton
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