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From: Christoph Hellwig <hch@lst.de>
To: tglx@linutronix.de, palmer@sifive.com, jason@lakedaemon.net,
	marc.zyngier@arm.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
	anup@brainfault.org, linux-kernel@vger.kernel.org,
	atish.patra@wdc.com, Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, shorne@gmail.com
Subject: [PATCH 6/9] RISC-V: Support per-hart timebase-frequency
Date: Thu, 26 Jul 2018 16:37:20 +0200	[thread overview]
Message-ID: <20180726143723.16585-7-hch@lst.de> (raw)
In-Reply-To: <20180726143723.16585-1-hch@lst.de>

From: Palmer Dabbelt <palmer@sifive.com>

This isn't actually how I want to do it, I just needed something right
now.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
---
 arch/riscv/kernel/time.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c
index 0df9b2cbd645..1bb01dc2d0f1 100644
--- a/arch/riscv/kernel/time.c
+++ b/arch/riscv/kernel/time.c
@@ -24,17 +24,24 @@ void __init init_clockevent(void)
 	csr_set(sie, SIE_STIE);
 }
 
-void __init time_init(void)
+static long __init timebase_frequency(void)
 {
 	struct device_node *cpu;
 	u32 prop;
 
 	cpu = of_find_node_by_path("/cpus");
-	if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop))
-		panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n");
-	riscv_timebase = prop;
+	if (cpu && !of_property_read_u32(cpu, "timebase-frequency", &prop))
+		return prop;
+	cpu = of_find_node_by_path("/cpus/cpu@0");
+	if (cpu && !of_property_read_u32(cpu, "timebase-frequency", &prop))
+		return prop;
 
-	lpj_fine = riscv_timebase / HZ;
+	panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n");
+}
 
+void __init time_init(void)
+{
+	riscv_timebase = timebase_frequency();
+	lpj_fine = riscv_timebase / HZ;
 	init_clockevent();
 }
-- 
2.18.0

  parent reply	other threads:[~2018-07-26 14:37 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-26 14:37 RFC: simplified RISC-V interrupt and clocksource handling Christoph Hellwig
2018-07-26 14:37 ` [PATCH 1/9] RISC-V: remove timer leftovers Christoph Hellwig
2018-07-26 14:37 ` [PATCH 2/9] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-07-26 14:37 ` [PATCH 3/9] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-07-26 14:37 ` [PATCH 4/9] RISC-V: add a definition for the SIE SEIE bit Christoph Hellwig
2018-07-26 14:37 ` [PATCH 5/9] RISC-V: implement low-level interrupt handling Christoph Hellwig
2018-08-02  9:48   ` Thomas Gleixner
2018-08-02  9:59     ` Christoph Hellwig
2018-07-26 14:37 ` Christoph Hellwig [this message]
2018-07-26 14:37 ` [PATCH 7/9] irqchip: add a RISC-V PLIC driver Christoph Hellwig
2018-07-28  0:04   ` Atish Patra
2018-07-30 15:51     ` Anup Patel
2018-07-31  3:21     ` Atish Patra
2018-07-31 16:57       ` Christoph Hellwig
2018-08-01  0:38         ` Atish Patra
2018-08-01  7:14           ` Christoph Hellwig
2018-08-01 12:16           ` Christoph Hellwig
2018-08-02  1:09             ` Atish Patra
2018-08-02  9:53               ` Christoph Hellwig
2018-08-01 14:18           ` Christoph Hellwig
2018-08-02  1:02             ` Atish Patra
2018-08-02  9:50               ` Christoph Hellwig
2018-07-31 16:37     ` Christoph Hellwig
2018-08-02 10:04   ` Thomas Gleixner
2018-08-02 11:51     ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 8/9] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-08-02  7:24   ` Nikolay Borisov
2018-08-02  9:52     ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 9/9] clocksource: new RISC-V SBI timer driver Christoph Hellwig
2018-07-26 18:51   ` Atish Patra
2018-07-27 14:41     ` Christoph Hellwig
2018-07-27 17:44       ` Atish Patra
2018-07-28 21:12   ` kbuild test robot
2018-07-28 21:16   ` kbuild test robot
2018-07-26 23:38 ` RFC: simplified RISC-V interrupt and clocksource handling Atish Patra
2018-07-27 14:44   ` Christoph Hellwig

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