[PATCH v6 0/3] ARM: dts: at91: sama5d2: Add nodes for I2S

[PATCH v6 0/3] ARM: dts: at91: sama5d2: Add nodes for I2S

[Codrin Ciubotariu]

These are the remaining dts patches from the series:
[PATCH v5 0/5] ASoC: add driver for Atmel I2S controller

v5 -> v6
 - removed unnecessary phandles to audio PLL clock from the I2S nodes;
 - using assigned clocks to set gclk as parent of i2smuxclk;

Codrin Ciubotariu (1):
  ARM: dts: at91: sama5d2: add I2S clock muxing nodes

Cyrille Pitchen (2):
  ARM: dts: at91: sama5d2: add nodes for I2S controllers
  ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S

 arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++++++++
 arch/arm/boot/dts/sama5d2.dtsi              | 56 +++++++++++++++++++++
 2 files changed, 84 insertions(+)

-- 
2.17.1

[PATCH v6 1/3] ARM: dts: at91: sama5d2: add I2S clock muxing nodes

[Codrin Ciubotariu]

This patch adds two clock muxes for the two I2S
buses present on sama5d2 platforms.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---

Changes in v6:
	- none

 arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 61f68e5c48e9..eeb6afa1cda7 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -992,6 +992,24 @@
 						atmel,clk-output-range = <0 100000000>;
 					};
 				};
+
+				i2s_clkmux {
+					compatible = "atmel,sama5d2-clk-i2s-mux";
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					i2s0muxck: i2s0_muxclk {
+						clocks = <&i2s0_clk>, <&i2s0_gclk>;
+						#clock-cells = <0>;
+						reg = <0>;
+					};
+
+					i2s1muxck: i2s1_muxclk {
+						clocks = <&i2s1_clk>, <&i2s1_gclk>;
+						#clock-cells = <0>;
+						reg = <1>;
+					};
+				};
 			};
 
 			qspi0: spi@f0020000 {
-- 
2.17.1

[PATCH v6 2/3] ARM: dts: at91: sama5d2: add nodes for I2S controllers

[Codrin Ciubotariu]

From: Cyrille Pitchen <cyrille.pitchen@atmel.com>

This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for
each I2S node.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[codrin.ciubotariu@microchip.com: removed unnecessary clock phandles]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---

Changes in v6:
	- removed unnecessary phandles to audio PLL clock from the I2S nodes;
	- using assigned clocks to set gclk as parent of i2smuxclk;

 arch/arm/boot/dts/sama5d2.dtsi | 38 ++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index eeb6afa1cda7..bf71dc00223a 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -58,6 +58,8 @@
 		serial1 = &uart3;
 		tcb0 = &tcb0;
 		tcb1 = &tcb1;
+		i2s0 = &i2s0;
+		i2s1 = &i2s1;
 	};
 
 	cpus {
@@ -1313,6 +1315,24 @@
 				clocks = <&clk32k>;
 			};
 
+			i2s0: i2s@f8050000 {
+				compatible = "atmel,sama5d2-i2s";
+				reg = <0xf8050000 0x100>;
+				interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
+				dmas = <&dma0
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+					 AT91_XDMAC_DT_PERID(31))>,
+				       <&dma0
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+					 AT91_XDMAC_DT_PERID(32))>;
+				dma-names = "tx", "rx";
+				clocks = <&i2s0_clk>, <&i2s0_gclk>;
+				clock-names = "pclk", "gclk";
+				assigned-clocks = <&i2s0muxck>;
+				assigned-clock-parents = <&i2s0_gclk>;
+				status = "disabled";
+			};
+
 			can0: can@f8054000 {
 				compatible = "bosch,m_can";
 				reg = <0xf8054000 0x4000>, <0x210000 0x4000>;
@@ -1506,6 +1526,24 @@
 				status = "disabled";
 			};
 
+			i2s1: i2s@fc04c000 {
+				compatible = "atmel,sama5d2-i2s";
+				reg = <0xfc04c000 0x100>;
+				interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
+				dmas = <&dma0
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+					 AT91_XDMAC_DT_PERID(33))>,
+				       <&dma0
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+					 AT91_XDMAC_DT_PERID(34))>;
+				dma-names = "tx", "rx";
+				clocks = <&i2s1_clk>, <&i2s1_gclk>;
+				clock-names = "pclk", "gclk";
+				assigned-clocks = <&i2s1muxck>;
+				assigned-parrents = <&i2s1_gclk>;
+				status = "disabled";
+			};
+
 			can1: can@fc050000 {
 				compatible = "bosch,m_can";
 				reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
-- 
2.17.1

[PATCH v6 3/3] ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S

[Codrin Ciubotariu]

From: Cyrille Pitchen <cyrille.pitchen@atmel.com>

This patch sets the pin muxing for the I2S controllers

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[codrin.ciubotariu@microchip.com: added pin muxing for the second
controller]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---

Changes in v6:
	- none;

 arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index fcc85d70f36e..95cbec0f8790 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -281,6 +281,11 @@
 				status = "okay";
 			};
 
+			i2s0: i2s@f8050000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2s0_default>;
+			};
+
 			can0: can@f8054000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_can0_default>;
@@ -424,6 +429,24 @@
 					bias-disable;
 				};
 
+				pinctrl_i2s0_default: i2s0_default {
+					pinmux = <PIN_PC1__I2SC0_CK>,
+						 <PIN_PC2__I2SC0_MCK>,
+						 <PIN_PC3__I2SC0_WS>,
+						 <PIN_PC4__I2SC0_DI0>,
+						 <PIN_PC5__I2SC0_DO0>;
+					bias-disable;
+				};
+
+				pinctrl_i2s1_default: i2s1_default {
+					pinmux = <PIN_PA15__I2SC1_CK>,
+						 <PIN_PA14__I2SC1_MCK>,
+						 <PIN_PA16__I2SC1_WS>,
+						 <PIN_PA17__I2SC1_DI0>,
+						 <PIN_PA18__I2SC1_DO0>;
+					bias-disable;
+				};
+
 				pinctrl_key_gpio_default: key_gpio_default {
 					pinmux = <PIN_PB9__GPIO>;
 					bias-pull-up;
@@ -546,6 +569,11 @@
 				status = "okay";
 			};
 
+			i2s1: i2s@fc04c000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_i2s1_default>;
+			};
+
 			can1: can@fc050000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_can1_default>;
-- 
2.17.1

Re: [PATCH v6 3/3] ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S

[Claudiu Beznea]

Hi Codrin,

On 30.07.2018 14:40, Codrin Ciubotariu wrote:
> From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
> 
> This patch sets the pin muxing for the I2S controllers
> 
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
> [codrin.ciubotariu@microchip.com: added pin muxing for the second
> controller]
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> ---
> 
> Changes in v6:
> 	- none;
> 
>  arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> index fcc85d70f36e..95cbec0f8790 100644
> --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
> @@ -281,6 +281,11 @@
>  				status = "okay";
>  			};
>  
> +			i2s0: i2s@f8050000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_i2s0_default>;

The approach with the disabled controllers in board DTS files (for our
boards) is to use the: status = "disabled" and if there are pin conflicts
with other controllers to put a mark in there, something like:
				status = "disabled"; /* Conflict with X */

I'm seeing that i2s1 is in conflict with sdmmc1 and spi0.

Thank you,
Claudiu Beznea

> +			};
> +
>  			can0: can@f8054000 {
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_can0_default>;
> @@ -424,6 +429,24 @@
>  					bias-disable;
>  				};
>  
> +				pinctrl_i2s0_default: i2s0_default {
> +					pinmux = <PIN_PC1__I2SC0_CK>,
> +						 <PIN_PC2__I2SC0_MCK>,
> +						 <PIN_PC3__I2SC0_WS>,
> +						 <PIN_PC4__I2SC0_DI0>,
> +						 <PIN_PC5__I2SC0_DO0>;
> +					bias-disable;
> +				};
> +
> +				pinctrl_i2s1_default: i2s1_default {
> +					pinmux = <PIN_PA15__I2SC1_CK>,
> +						 <PIN_PA14__I2SC1_MCK>,
> +						 <PIN_PA16__I2SC1_WS>,
> +						 <PIN_PA17__I2SC1_DI0>,
> +						 <PIN_PA18__I2SC1_DO0>;
> +					bias-disable;
> +				};
> +
>  				pinctrl_key_gpio_default: key_gpio_default {
>  					pinmux = <PIN_PB9__GPIO>;
>  					bias-pull-up;
> @@ -546,6 +569,11 @@
>  				status = "okay";
>  			};
>  
> +			i2s1: i2s@fc04c000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&pinctrl_i2s1_default>;
> +			};
> +
>  			can1: can@fc050000 {
>  				pinctrl-names = "default";
>  				pinctrl-0 = <&pinctrl_can1_default>;
> 

Re: [PATCH v6 3/3] ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S

[Codrin Ciubotariu]

On 30.07.2018 16:49, Claudiu Beznea wrote:
> Hi Codrin,
> 
> On 30.07.2018 14:40, Codrin Ciubotariu wrote:
>> From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
>>
>> This patch sets the pin muxing for the I2S controllers
>>
>> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
>> [codrin.ciubotariu@microchip.com: added pin muxing for the second
>> controller]
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
>> ---
>>
>> Changes in v6:
>> 	- none;
>>
>>   arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
>> index fcc85d70f36e..95cbec0f8790 100644
>> --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
>> +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
>> @@ -281,6 +281,11 @@
>>   				status = "okay";
>>   			};
>>   
>> +			i2s0: i2s@f8050000 {
>> +				pinctrl-names = "default";
>> +				pinctrl-0 = <&pinctrl_i2s0_default>;
> 
> The approach with the disabled controllers in board DTS files (for our
> boards) is to use the: status = "disabled" and if there are pin conflicts
> with other controllers to put a mark in there, something like:
> 				status = "disabled"; /* Conflict with X */
> 
> I'm seeing that i2s1 is in conflict with sdmmc1 and spi0.

Ok, I will disable them and add the pin conflicts in the next version. 
Thank you for your review.

Best regards,
Codrin