From: Rob Herring <robh@kernel.org>
To: Emmanuel Vadot <manu@freebsd.org>
Cc: srinivas.kandagatla@linaro.org, mark.rutland@arm.com,
maxime.ripard@bootlin.com, wens@csie.org,
catalin.marinas@arm.com, will.deacon@arm.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller
Date: Mon, 30 Jul 2018 17:15:06 -0600 [thread overview]
Message-ID: <20180730231506.GA8608@rob-hp-laptop> (raw)
In-Reply-To: <20180727115205.20955-3-manu@freebsd.org>
On Fri, Jul 27, 2018 at 01:52:04PM +0200, Emmanuel Vadot wrote:
> The H5 SoC have a SID controller that looks like the one in A64, the
> cells are in the same offset but doesn't contain the same data (thermal
> sensor calibration for example).
> Add a binding for it.
>
> Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
> ---
> Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2018-07-30 23:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 11:52 [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node Emmanuel Vadot
2018-07-27 11:52 ` [PATCH v3 2/4] ARM: dts: sun8i: h3: Add SID compatible string Emmanuel Vadot
2018-07-27 11:52 ` [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller Emmanuel Vadot
2018-07-30 23:15 ` Rob Herring [this message]
2018-07-27 11:52 ` [PATCH v3 4/4] arm64: dts: allwinner: h5: Add SID for H5 Emmanuel Vadot
2018-07-30 8:26 ` [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node Maxime Ripard
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