* [PATCH V2 1/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document
[not found] <20180801104941.29432-1-john@phrozen.org>
@ 2018-08-01 10:49 ` John Crispin
2018-08-07 17:49 ` Rob Herring
0 siblings, 1 reply; 2+ messages in thread
From: John Crispin @ 2018-08-01 10:49 UTC (permalink / raw)
To: Alban Bedel, Kate Stewart, Greg Kroah-Hartman
Cc: linux-kernel, linux-arm-msm, John Crispin, Rob Herring,
devicetree
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcomm Dakota SoCs.
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
diff --git a/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
new file mode 100644
index 000000000000..320a596c45b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
@@ -0,0 +1,21 @@
+Qualcom Dakota HS/SS USB PHY
+
+Required properties:
+ - compatible: "qcom,ipq4019-usb-ss-phy",
+ "qcom,ipq4019-usb-hs-phy"
+ - reg: offset and length of the registers
+ - #phy-cells: should be 0
+ - resets: the reset controllers as listed below
+ - reset-names: the names of the reset controllers
+ "por" - the POR reset line for SS and HS phys
+ "srif" - the SRIF reset line for HS phys
+Example:
+
+usb-phy@a8000 {
+ compatible = "qcom,ipq4019-usb-hs-phy";
+ phy-cells = <0>;
+ reg = <0xa8000 0x40>;
+ resets = <&gcc USB2_HSPHY_POR_ARES>,
+ <&gcc USB2_HSPHY_S_ARES>;
+ reset-names = "por", "srif";
+};
--
2.11.0
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