From: Christoph Hellwig <hch@lst.de>
To: tglx@linutronix.de, palmer@sifive.com, jason@lakedaemon.net,
marc.zyngier@arm.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
anup@brainfault.org, linux-kernel@vger.kernel.org,
atish.patra@wdc.com, Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, shorne@gmail.com
Subject: [PATCH 09/11] RISC-V: Support per-hart timebase-frequency
Date: Thu, 2 Aug 2018 13:50:06 +0200 [thread overview]
Message-ID: <20180802115008.4031-10-hch@lst.de> (raw)
In-Reply-To: <20180802115008.4031-1-hch@lst.de>
From: Palmer Dabbelt <palmer@sifive.com>
Follow the updated DT specs and read the timebase-frequency from the
CPU 0 node.
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
[hch: updated changelog]
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/riscv/kernel/time.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c
index 0df9b2cbd645..1bb01dc2d0f1 100644
--- a/arch/riscv/kernel/time.c
+++ b/arch/riscv/kernel/time.c
@@ -24,17 +24,24 @@ void __init init_clockevent(void)
csr_set(sie, SIE_STIE);
}
-void __init time_init(void)
+static long __init timebase_frequency(void)
{
struct device_node *cpu;
u32 prop;
cpu = of_find_node_by_path("/cpus");
- if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop))
- panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n");
- riscv_timebase = prop;
+ if (cpu && !of_property_read_u32(cpu, "timebase-frequency", &prop))
+ return prop;
+ cpu = of_find_node_by_path("/cpus/cpu@0");
+ if (cpu && !of_property_read_u32(cpu, "timebase-frequency", &prop))
+ return prop;
- lpj_fine = riscv_timebase / HZ;
+ panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n");
+}
+void __init time_init(void)
+{
+ riscv_timebase = timebase_frequency();
+ lpj_fine = riscv_timebase / HZ;
init_clockevent();
}
--
2.18.0
next prev parent reply other threads:[~2018-08-02 11:50 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-02 11:49 simplified RISC-V interrupt and clocksource handling v2 Christoph Hellwig
2018-08-02 11:49 ` [PATCH 01/11] dt-bindings: Correct RISC-V's timebase-frequency Christoph Hellwig
2018-08-08 14:44 ` Rob Herring
2018-08-02 11:49 ` [PATCH 02/11] dt-bindings: Add an enable method to RISC-V Christoph Hellwig
2018-08-08 14:43 ` Rob Herring
2018-08-02 11:50 ` [PATCH 03/11] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-08-02 22:08 ` Atish Patra
2018-08-03 13:30 ` Christoph Hellwig
2018-08-06 20:59 ` Rob Herring
2018-08-07 7:20 ` Christoph Hellwig
2018-08-08 2:17 ` Palmer Dabbelt
2018-08-08 6:42 ` Atish Patra
2018-08-08 14:16 ` Rob Herring
2018-08-08 15:09 ` Christoph Hellwig
2018-08-08 16:47 ` Marc Zyngier
2018-08-08 16:57 ` Christoph Hellwig
2018-08-09 10:19 ` Marc Zyngier
2018-08-08 19:38 ` Palmer Dabbelt
2018-08-08 23:32 ` Rob Herring
2018-08-09 6:29 ` Palmer Dabbelt
2018-08-09 6:43 ` Christoph Hellwig
2018-08-10 16:57 ` Rob Herring
2018-08-10 20:09 ` Palmer Dabbelt
2018-08-13 14:09 ` Rob Herring
2018-08-02 11:50 ` [PATCH 04/11] RISC-V: remove timer leftovers Christoph Hellwig
2018-08-02 11:50 ` [PATCH 05/11] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-08-02 11:50 ` [PATCH 06/11] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-08-02 11:50 ` [PATCH 07/11] RISC-V: add a definition for the SIE SEIE bit Christoph Hellwig
2018-08-02 11:50 ` [PATCH 08/11] RISC-V: implement low-level interrupt handling Christoph Hellwig
2018-08-02 11:50 ` Christoph Hellwig [this message]
2018-08-02 22:19 ` [PATCH 09/11] RISC-V: Support per-hart timebase-frequency Atish Patra
2018-08-03 12:33 ` Christoph Hellwig
2018-08-04 9:58 ` Christoph Hellwig
2018-08-06 20:34 ` Palmer Dabbelt
2018-08-08 6:47 ` Atish Patra
2018-08-02 11:50 ` [PATCH 10/11] irqchip: add a SiFive PLIC driver Christoph Hellwig
2018-08-02 23:13 ` Atish Patra
2018-08-03 12:29 ` Christoph Hellwig
2018-08-02 11:50 ` [PATCH 11/11] clocksource: new RISC-V SBI timer driver Christoph Hellwig
2018-08-02 23:21 ` Atish Patra
2018-08-03 12:31 ` Christoph Hellwig
2018-08-02 17:24 ` simplified RISC-V interrupt and clocksource handling v2 Palmer Dabbelt
2018-08-03 7:49 ` Thomas Gleixner
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