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From: Thierry Reding <thierry.reding@gmail.com>
To: Aapo Vienamo <avienamo@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Stefan Agner <stefan@agner.ch>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH 15/40] mmc: tegra: Power on the calibration pad
Date: Thu, 9 Aug 2018 14:52:26 +0200	[thread overview]
Message-ID: <20180809125226.GW21639@ulmo> (raw)
In-Reply-To: <1533141150-10511-16-git-send-email-avienamo@nvidia.com>

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On Wed, Aug 01, 2018 at 07:32:05PM +0300, Aapo Vienamo wrote:
> Automatic pad drive strength calibration is performed on a separate pad
> identical to the ones used for driving the actual bus. Power on the
> calibration pad during the calibration procedure and power it off
> afterwards to save power.
> 
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  drivers/mmc/host/sdhci-tegra.c | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 53c035b9..9e22fec 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -54,6 +54,7 @@
>  #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL			0x1e0
>  #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK	0x0000000f
>  #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL	0x7
> +#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD	BIT(31)
>  
>  #define SDHCI_TEGRA_AUTO_CAL_STATUS			0x1ec
>  #define SDHCI_TEGRA_AUTO_CAL_ACTIVE			BIT(31)
> @@ -240,11 +241,32 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
>  	tegra_host->ddr_signaling = false;
>  }
>  
> +static void tegra_sdhci_configure_cal_pad(struct sdhci_host *host, bool enable)
> +{
> +	u32 reg;
> +
> +	/*
> +	 * Enable or disable the additional I/O pad used by the drive strength
> +	 * calibration process.
> +	 */
> +	reg = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
> +	if (enable) {
> +		reg |= SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD;
> +		sdhci_writel(host, reg, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
> +		udelay(1);
> +	} else {
> +		reg &= ~SDHCI_TEGRA_SDMEM_COMP_PADCTRL_E_INPUT_E_PWRD;
> +		sdhci_writel(host, reg, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
> +	}

Might be worth extracting the common write as well. This would of course
mean that we either have to conditionalize the udelay() again, or we
just keep it in both cases. Doesn't really hurt to wait a little on
disabling, right?

Either way is fine with me. Though it would be nice if we could make the
udelay() go away and use a sleeping variant if possible. This isn't run
very often, so even if we overshoot by a couple of microseconds it isn't
that bad. 1 us is pretty short, but I've been burnt by busy loops a
couple of times, so I like to avoid them at all costs.

Thierry

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  reply	other threads:[~2018-08-09 12:52 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-01 16:31 [PATCH 00/40] Tegra SDHCI add support for HS200 and UHS signaling Aapo Vienamo
2018-08-01 16:31 ` [PATCH 01/40] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-08-09 12:13   ` Thierry Reding
2018-08-09 16:24     ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties Aapo Vienamo
2018-08-09 12:15   ` Thierry Reding
2018-08-09 16:36     ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo
2018-08-09 12:18   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Aapo Vienamo
2018-08-01 16:31 ` [PATCH 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-08-09 12:20   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 06/40] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-08-01 16:31 ` [PATCH 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-08-09 12:22   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-08-01 16:31 ` [PATCH 09/40] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo
2018-08-01 16:32 ` [PATCH 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-08-09 12:27   ` Thierry Reding
2018-08-09 12:44     ` Aapo Vienamo
2018-08-09 13:12       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching Aapo Vienamo
2018-08-09 12:43   ` Thierry Reding
2018-08-09 12:52     ` Aapo Vienamo
2018-08-09 13:14       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 13/40] mmc: tegra: Poll for calibration completion Aapo Vienamo
2018-08-09 12:46   ` Thierry Reding
2018-08-09 12:56     ` Aapo Vienamo
2018-08-09 13:44       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 14/40] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo
2018-08-01 16:32 ` [PATCH 15/40] mmc: tegra: Power on the calibration pad Aapo Vienamo
2018-08-09 12:52   ` Thierry Reding [this message]
2018-08-01 16:32 ` [PATCH 16/40] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo
2018-08-09 12:54   ` Thierry Reding
2018-08-01 16:32 ` [PATCH 17/40] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 18/40] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo
2018-08-01 16:32 ` [PATCH 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 20/40] mmc: tegra: Add a workaround for tap value change glitch Aapo Vienamo
2018-08-09 12:58   ` Thierry Reding
2018-08-01 16:32 ` [PATCH 21/40] mmc: tegra: Parse default trim and tap from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 22/40] mmc: tegra: Configure default tap values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 23/40] mmc: tegra: Configure default trim value on reset Aapo Vienamo
2018-08-01 16:32 ` [PATCH 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug Aapo Vienamo
2018-08-01 16:32 ` [PATCH 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 30/40] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states Aapo Vienamo
2018-08-01 16:32 ` [PATCH 31/40] arm64: dts: Add Tegra186 " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V Aapo Vienamo
2018-08-01 16:32 ` [PATCH 33/40] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply Aapo Vienamo
2018-08-01 16:32 ` [PATCH 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo
2018-08-01 16:32 ` [PATCH 36/40] arm64: dts: tegra210: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 37/40] arm64: dts: tegra210: Add SDHCI tap and trim values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 38/40] arm64: dts: tegra186: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 40/40] arm64: dts: tegra210: " Aapo Vienamo

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