From: Quentin Schulz <quentin.schulz@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: alexandre.belloni@bootlin.com, ralf@linux-mips.org,
paul.burton@mips.com, jhogan@kernel.org, mark.rutland@arm.com,
davem@davemloft.net, kishon@ti.com, andrew@lunn.ch,
f.fainelli@gmail.com, linux-mips@linux-mips.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, allan.nielsen@microsemi.com,
thomas.petazzoni@bootlin.com
Subject: Re: [PATCH net-next 02/10] dt-bindings: net: ocelot: remove hsio from the list of register address spaces
Date: Tue, 14 Aug 2018 08:49:53 +0200 [thread overview]
Message-ID: <20180814064953.vboz2gryq4jff34n@qschulz> (raw)
In-Reply-To: <20180813223103.GA16669@rob-hp-laptop>
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Hi Rob,
On Mon, Aug 13, 2018 at 04:31:03PM -0600, Rob Herring wrote:
> On Mon, Jul 30, 2018 at 02:43:47PM +0200, Quentin Schulz wrote:
> > HSIO register address space should be handled outside of the MAC
> > controller as there are some registers for PLL5 configuring,
> > SerDes/switch port muxing and a thermal sensor IP, so let's remove it.
> >
> > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
> > ---
> > Documentation/devicetree/bindings/mips/mscc.txt | 16 ++++++++++++-
> > Documentation/devicetree/bindings/net/mscc-ocelot.txt | 9 ++-----
> > 2 files changed, 19 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt
> > index ae15ec3..bc817e9 100644
> > --- a/Documentation/devicetree/bindings/mips/mscc.txt
> > +++ b/Documentation/devicetree/bindings/mips/mscc.txt
> > @@ -41,3 +41,19 @@ Example:
> > compatible = "mscc,ocelot-cpu-syscon", "syscon";
> > reg = <0x70000000 0x2c>;
> > };
> > +
> > +o HSIO regs:
> > +
> > +The SoC has a few registers (HSIO) handling miscellaneous functionalities:
> > +configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
> > +status, SerDes muxing and a thermal sensor.
> > +
> > +Required properties:
> > +- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
> > +- reg : Should contain registers location and length
> > +
> > +Example:
> > + syscon@10d0000 {
> > + compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
>
> simple-mfd is not appropriate without child nodes, so drop it.
>
Understood but it's an intermediate patch. Later (patch 8), the SerDes
muxing "controller" is added as a child to this node. There most likely
will be some others in the future (temperature sensor for example).
Furthermore, there's already a simple-mfd without children in this file:
https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/mips/mscc.txt#L19
How should we handle this case?
Thanks,
Quentin
> > + reg = <0x10d0000 0x10000>;
> > + };
> > diff --git a/Documentation/devicetree/bindings/net/mscc-ocelot.txt b/Documentation/devicetree/bindings/net/mscc-ocelot.txt
> > index 0a84711..9e5c17d 100644
> > --- a/Documentation/devicetree/bindings/net/mscc-ocelot.txt
> > +++ b/Documentation/devicetree/bindings/net/mscc-ocelot.txt
> > @@ -12,7 +12,6 @@ Required properties:
> > - "sys"
> > - "rew"
> > - "qs"
> > - - "hsio"
> > - "qsys"
> > - "ana"
> > - "portX" with X from 0 to the number of last port index available on that
> > @@ -45,7 +44,6 @@ Example:
> > reg = <0x1010000 0x10000>,
> > <0x1030000 0x10000>,
> > <0x1080000 0x100>,
> > - <0x10d0000 0x10000>,
> > <0x11e0000 0x100>,
> > <0x11f0000 0x100>,
> > <0x1200000 0x100>,
> > @@ -59,10 +57,9 @@ Example:
> > <0x1280000 0x100>,
> > <0x1800000 0x80000>,
> > <0x1880000 0x10000>;
> > - reg-names = "sys", "rew", "qs", "hsio", "port0",
> > - "port1", "port2", "port3", "port4", "port5",
> > - "port6", "port7", "port8", "port9", "port10",
> > - "qsys", "ana";
> > + reg-names = "sys", "rew", "qs", "port0", "port1", "port2",
> > + "port3", "port4", "port5", "port6", "port7",
> > + "port8", "port9", "port10", "qsys", "ana";
> > interrupts = <21 22>;
> > interrupt-names = "xtr", "inj";
> >
> > --
> > git-series 0.9.1
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next prev parent reply other threads:[~2018-08-14 6:49 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-30 12:43 [PATCH 00/10] mscc: ocelot: add support for SerDes muxing configuration Quentin Schulz
2018-07-30 12:43 ` [PATCH net-next 01/10] MIPS: mscc: ocelot: make HSIO registers address range a syscon Quentin Schulz
2018-07-31 7:51 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 02/10] dt-bindings: net: ocelot: remove hsio from the list of register address spaces Quentin Schulz
2018-07-31 7:52 ` Alexandre Belloni
2018-08-13 22:31 ` Rob Herring
2018-08-14 6:49 ` Quentin Schulz [this message]
2018-08-14 12:41 ` Alexandre Belloni
2018-08-16 14:25 ` Quentin Schulz
2018-08-27 20:57 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 03/10] net: mscc: ocelot: get HSIO regmap from syscon Quentin Schulz
2018-07-31 7:53 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 04/10] net: mscc: ocelot: move the HSIO header to include/soc Quentin Schulz
2018-07-31 8:02 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 05/10] net: mscc: ocelot: simplify register access for PLL5 configuration Quentin Schulz
2018-07-31 8:02 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH 06/10] phy: add QSGMII and PCIE modes Quentin Schulz
2018-07-30 12:43 ` [PATCH 07/10] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-07-30 13:34 ` Andrew Lunn
2018-08-01 8:24 ` Quentin Schulz
2018-08-01 14:31 ` Andrew Lunn
2018-08-06 12:47 ` Quentin Schulz
2018-07-30 13:38 ` Andrew Lunn
2018-07-30 21:39 ` Florian Fainelli
2018-08-01 8:15 ` Quentin Schulz
2018-08-13 22:37 ` Rob Herring
2018-08-14 12:45 ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH 08/10] MIPS: mscc: ocelot: add SerDes mux DT node Quentin Schulz
2018-07-30 12:43 ` [PATCH 09/10] phy: add driver for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-07-30 12:43 ` [PATCH net-next 10/10] net: mscc: ocelot: make use of SerDes PHYs for handling their configuration Quentin Schulz
2018-07-30 13:50 ` Andrew Lunn
2018-08-01 7:51 ` Quentin Schulz
2018-07-30 13:01 ` [PATCH 00/10] mscc: ocelot: add support for SerDes muxing configuration Quentin Schulz
2018-07-30 13:24 ` Andrew Lunn
2018-08-01 7:54 ` Quentin Schulz
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