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From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org,
	mark.rutland@arm.com, davem@davemloft.net, kishon@ti.com,
	andrew@lunn.ch, linux-mips@linux-mips.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org, allan.nielsen@microsemi.com,
	thomas.petazzoni@bootlin.com
Subject: Re: [PATCH 07/10] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing
Date: Tue, 14 Aug 2018 14:45:47 +0200	[thread overview]
Message-ID: <20180814124547.GL943@piout.net> (raw)
In-Reply-To: <20180813223748.GA20086@rob-hp-laptop>

On 13/08/2018 16:37:48-0600, Rob Herring wrote:
> > I'm fine with a define for the second value (which is basically the enum
> > serdes_type I've defined at the beginning of the serdes driver) but I
> > don't see the point of defining the index of the SerDes. What would it
> > look like?
> > 
> > enum serdes_type {
> > 	SERDES1G = 1,
> > 	SERDES6G = 6,
> > }
> > 
> > #define SERDES1G_0	0
> > #define SERDES1G_1	1
> > #define SERDES1G_2	2
> > #define SERDES6G_0	0
> > #define SERDES6G_1	1
> > 
> > Then, e.g.:
> > 
> > &port5 {
> > 	phys = <&serdes 5 SERDES1G SERDES1G_0>
> > };
> > 
> > If you want a define for the pair (serdes_type, serdes_index), I don't
> > see how I could re-use it on the driver side but it makes more sense on the
> > DeviceTree side:
> > 
> > #define SERDES1G_0	1 0
> > #define SERDES1G_1	1 1
> > #define SERDES1G_2	1 2
> > #define SERDES6G_0	6 0
> > #define SERDES6G_1	6 1
> 
> I prefer #defines which are a single number. Otherwise if you read a dts 
> file when #phy-cells is 3, it will look like an error in that you have 
> what looks like 2 cells.
> 

Maybe we should not have the type in DT and simply have an index. The
driver will now what the serdes type is anyway and the defines would be:

#define SERDES1G_0  0
#define SERDES1G_1  1
#define SERDES1G_2  2
#define SERDES6G_0  3
#define SERDES6G_1  4

The main drawback is that this requires one include file per soc.

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

  reply	other threads:[~2018-08-14 12:45 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-30 12:43 [PATCH 00/10] mscc: ocelot: add support for SerDes muxing configuration Quentin Schulz
2018-07-30 12:43 ` [PATCH net-next 01/10] MIPS: mscc: ocelot: make HSIO registers address range a syscon Quentin Schulz
2018-07-31  7:51   ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 02/10] dt-bindings: net: ocelot: remove hsio from the list of register address spaces Quentin Schulz
2018-07-31  7:52   ` Alexandre Belloni
2018-08-13 22:31   ` Rob Herring
2018-08-14  6:49     ` Quentin Schulz
2018-08-14 12:41       ` Alexandre Belloni
2018-08-16 14:25         ` Quentin Schulz
2018-08-27 20:57           ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 03/10] net: mscc: ocelot: get HSIO regmap from syscon Quentin Schulz
2018-07-31  7:53   ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 04/10] net: mscc: ocelot: move the HSIO header to include/soc Quentin Schulz
2018-07-31  8:02   ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH net-next 05/10] net: mscc: ocelot: simplify register access for PLL5 configuration Quentin Schulz
2018-07-31  8:02   ` Alexandre Belloni
2018-07-30 12:43 ` [PATCH 06/10] phy: add QSGMII and PCIE modes Quentin Schulz
2018-07-30 12:43 ` [PATCH 07/10] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-07-30 13:34   ` Andrew Lunn
2018-08-01  8:24     ` Quentin Schulz
2018-08-01 14:31       ` Andrew Lunn
2018-08-06 12:47         ` Quentin Schulz
2018-07-30 13:38   ` Andrew Lunn
2018-07-30 21:39   ` Florian Fainelli
2018-08-01  8:15     ` Quentin Schulz
2018-08-13 22:37       ` Rob Herring
2018-08-14 12:45         ` Alexandre Belloni [this message]
2018-07-30 12:43 ` [PATCH 08/10] MIPS: mscc: ocelot: add SerDes mux DT node Quentin Schulz
2018-07-30 12:43 ` [PATCH 09/10] phy: add driver for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-07-30 12:43 ` [PATCH net-next 10/10] net: mscc: ocelot: make use of SerDes PHYs for handling their configuration Quentin Schulz
2018-07-30 13:50   ` Andrew Lunn
2018-08-01  7:51     ` Quentin Schulz
2018-07-30 13:01 ` [PATCH 00/10] mscc: ocelot: add support for SerDes muxing configuration Quentin Schulz
2018-07-30 13:24 ` Andrew Lunn
2018-08-01  7:54   ` Quentin Schulz

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