[PATCH v3 0/3] soc: amlogic: add meson-canvas

[PATCH v3 0/3] soc: amlogic: add meson-canvas

[Maxime Jourdan]

Amlogic SoCs feature a set of 256 canvas that act as pixel buffer
descriptors. Some IPs like the display and video decoders access those
pixels by using canvas IDs rather than direct phy addresses.

As such, allocating/manipulating canvases can be done concurrently and
there is a need for a standalone, lock-aware canvas provider module.

Currently, canvas code lies in the drm/meson module as it is the sole
user.

This patchset adds such canvas provider module.

Changes since v2: [1]
 - Don't include the drm changes in the serie.
 - Remove the syscon node in the dts and doc
 - Rename meson_canvas_setup to meson_canvas_config

Changes since v1: [0]
 - Convert ops struct to a public API
 - Added comments
 - Hid the of-node probe code behind meson_canvas_get
 - Changed device lock to a spinlock with irqsave

[0]: https://lkml.org/lkml/2018/8/1/1512
[1]: https://lkml.org/lkml/2018/8/7/894

Maxime Jourdan (3):
  dt-bindings: soc: amlogic: add meson-canvas documentation
  soc: amlogic: add meson-canvas driver
  ARM64: dts: meson-gx: add dmcbus and canvas nodes.

 .../bindings/soc/amlogic/amlogic,canvas.txt   |  29 +++
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi     |  13 ++
 drivers/soc/amlogic/Kconfig                   |   7 +
 drivers/soc/amlogic/Makefile                  |   1 +
 drivers/soc/amlogic/meson-canvas.c            | 185 ++++++++++++++++++
 include/linux/soc/amlogic/meson-canvas.h      |  65 ++++++
 6 files changed, 300 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt
 create mode 100644 drivers/soc/amlogic/meson-canvas.c
 create mode 100644 include/linux/soc/amlogic/meson-canvas.h

-- 
2.18.0

[PATCH v3 1/3] dt-bindings: soc: amlogic: add meson-canvas documentation

[Maxime Jourdan]

DT bindings doc for amlogic,meson-canvas

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
---
 .../bindings/soc/amlogic/amlogic,canvas.txt   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt

diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt
new file mode 100644
index 000000000000..436d2106e80d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt
@@ -0,0 +1,29 @@
+Amlogic Canvas
+================================
+
+A canvas is a collection of metadata that describes a pixel buffer.
+Those metadata include: width, height, phyaddr, wrapping, block mode
+and endianness.
+
+Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
+rather than use the phy addresses directly. For instance, this is the case for
+the video decoders and the display.
+
+Amlogic SoCs have 256 canvas.
+
+Device Tree Bindings:
+---------------------
+
+Video Lookup Table
+--------------------------
+
+Required properties:
+- compatible: "amlogic,canvas"
+- reg: Base physical address and size of the canvas registers.
+
+Example:
+
+canvas: video-lut@48 {
+	compatible = "amlogic,canvas";
+	reg = <0x0 0x48 0x0 0x14>;
+};
-- 
2.18.0

[PATCH v3 3/3] ARM64: dts: meson-gx: add dmcbus and canvas nodes.

[Maxime Jourdan]

DMC is a small memory region with various registers,
including the ones needed for the canvas module.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index b8dc4dbb391b..5dd63ecf8b05 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -423,6 +423,19 @@
 			};
 		};
 
+		dmcbus: bus@c8838000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc8838000 0x0 0x400>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
+
+			canvas: video-lut@48 {
+				compatible = "amlogic,canvas";
+				reg = <0x0 0x48 0x0 0x14>;
+			};
+		};
+
 		hiubus: bus@c883c000 {
 			compatible = "simple-bus";
 			reg = <0x0 0xc883c000 0x0 0x2000>;
-- 
2.18.0

Re: [PATCH v3 1/3] dt-bindings: soc: amlogic: add meson-canvas documentation

[Rob Herring]

On Thu, 23 Aug 2018 13:49:52 +0200, Maxime Jourdan wrote:
> DT bindings doc for amlogic,meson-canvas
> 
> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
> ---
>  .../bindings/soc/amlogic/amlogic,canvas.txt   | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v3 3/3] ARM64: dts: meson-gx: add dmcbus and canvas nodes.

[Maxime Jourdan]

Hi Kevin,

If you don't mind, please change the title from "ARM64" to "arm64" if
this gets merged.

Thanks!

Maxime

Re: [PATCH v3 3/3] ARM64: dts: meson-gx: add dmcbus and canvas nodes.

[Kevin Hilman]

Maxime Jourdan <mjourdan@baylibre.com> writes:

> DMC is a small memory region with various registers,
> including the ones needed for the canvas module.
>
> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>

Applied to v4.20/dt64 with s/ARM64/arm64/ as requested.

Thanks,

Kevin