* [PATCH 1/3] ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY
[not found] ` <20180830080926.15027-1-wens-jdAy2FN1RRM@public.gmane.org>
@ 2018-08-30 8:09 ` Chen-Yu Tsai
2018-08-30 8:09 ` [PATCH 2/3] ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus Chen-Yu Tsai
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Chen-Yu Tsai @ 2018-08-30 8:09 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
The external RTL8211E RGMII Ethernet PHY is configured via external
resistors to use the address 0x1. The 0x0 address is a broadcast address
for this family of PHYs, and should not be used explicitly.
Fixes: 8c7ba536e709 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 30540dc8e0c5..bdda0d99128e 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -140,7 +140,7 @@
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
+ reg = <1>;
};
};
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/3] ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus
[not found] ` <20180830080926.15027-1-wens-jdAy2FN1RRM@public.gmane.org>
2018-08-30 8:09 ` [PATCH 1/3] ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY Chen-Yu Tsai
@ 2018-08-30 8:09 ` Chen-Yu Tsai
2018-08-30 8:09 ` [PATCH 3/3] arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5 Chen-Yu Tsai
2018-08-31 10:17 ` [PATCH 0/3] " Maxime Ripard
3 siblings, 0 replies; 7+ messages in thread
From: Chen-Yu Tsai @ 2018-08-30 8:09 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
Three more variants of the Bananapi M2 Plus have been introduced. One
with the H5 instead of the H3, another with the H2+ instead, and the
last with the H3 but with WiFi and eMMC removed.
All these variants use the same board. This patch splits out the
non-SoC-specific parts of the device tree, so that they can be shared
among all the variants. The original Bananapi M2 Plus has been renamed
to Bananapi M2 Plus H3.
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
.../boot/dts/sun8i-h3-bananapi-m2-plus.dts | 190 +-----------------
...2-plus.dts => sunxi-bananapi-m2-plus.dtsi} | 5 -
2 files changed, 2 insertions(+), 193 deletions(-)
copy arch/arm/boot/dts/{sun8i-h3-bananapi-m2-plus.dts => sunxi-bananapi-m2-plus.dtsi} (97%)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index bdda0d99128e..195a75da13f1 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -42,195 +42,9 @@
/dts-v1/;
#include "sun8i-h3.dtsi"
-#include "sunxi-common-regulators.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "sunxi-bananapi-m2-plus.dtsi"
/ {
- model = "Banana Pi BPI-M2-Plus";
+ model = "Banana Pi BPI-M2-Plus H3";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
-
- aliases {
- ethernet0 = &emac;
- serial0 = &uart0;
- serial1 = &uart1;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
-
- pwr_led {
- label = "bananapi-m2-plus:red:pwr";
- gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
- default-state = "on";
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
-
- sw4 {
- label = "power";
- linux,code = <BTN_0>;
- gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
- };
- };
-
- reg_gmac_3v3: gmac-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "gmac-3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <100000>;
- enable-active-high;
- gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
- };
-
- wifi_pwrseq: wifi_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- };
-};
-
-&de {
- status = "okay";
-};
-
-&ehci0 {
- status = "okay";
-};
-
-&ehci1 {
- status = "okay";
-};
-
-&ehci2 {
- status = "okay";
-};
-
-&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
- phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
-
- status = "okay";
-};
-
-&external_mdio {
- ext_rgmii_phy: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
-};
-
-&hdmi {
- status = "okay";
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
- status = "okay";
-};
-
-&mmc0 {
- vmmc-supply = <®_vcc3v3>;
- bus-width = <4>;
- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
- status = "okay";
-};
-
-&mmc1 {
- vmmc-supply = <®_vcc3v3>;
- vqmmc-supply = <®_vcc3v3>;
- mmc-pwrseq = <&wifi_pwrseq>;
- bus-width = <4>;
- non-removable;
- status = "okay";
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
- interrupt-names = "host-wake";
- };
-};
-
-&mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_8bit_pins>;
- vmmc-supply = <®_vcc3v3>;
- vqmmc-supply = <®_vcc3v3>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&ohci0 {
- status = "okay";
-};
-
-&ohci1 {
- status = "okay";
-};
-
-&ohci2 {
- status = "okay";
-};
-
-®_usb0_vbus {
- gpio = <&pio 3 11 GPIO_ACTIVE_HIGH>; /* PD11 */
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
- status = "okay";
-};
-
-&usb_otg {
- dr_mode = "otg";
- status = "okay";
-};
-
-&usbphy {
- usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
- usb0_vbus-supply = <®_usb0_vbus>;
- /* USB host VBUS is on as long as VCC-IO is on */
- status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
similarity index 97%
copy from arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
copy to arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
index bdda0d99128e..b3283aeb5b7d 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
@@ -40,17 +40,12 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-/dts-v1/;
-#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
- model = "Banana Pi BPI-M2-Plus";
- compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
-
aliases {
ethernet0 = &emac;
serial0 = &uart0;
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
[not found] ` <20180830080926.15027-1-wens-jdAy2FN1RRM@public.gmane.org>
2018-08-30 8:09 ` [PATCH 1/3] ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY Chen-Yu Tsai
2018-08-30 8:09 ` [PATCH 2/3] ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus Chen-Yu Tsai
@ 2018-08-30 8:09 ` Chen-Yu Tsai
2018-08-31 10:17 ` [PATCH 0/3] " Maxime Ripard
3 siblings, 0 replies; 7+ messages in thread
From: Chen-Yu Tsai @ 2018-08-30 8:09 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
The Bananapi M2 Plus H5 is a variant of the original Bananapi M2 Plus,
with the H3 SoC replaced with an H5. Everything else is the same.
Add a stub device tree incorporating the shared bananapi-m2-plus dtsi
file.
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts | 11 +++++++++++
2 files changed, 12 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index b7034327b28b..82335360499d 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
new file mode 100644
index 000000000000..77661006dfba
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2018 Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include <arm/sunxi-bananapi-m2-plus.dtsi>
+
+/ {
+ model = "Banana Pi BPI-M2-Plus H5";
+ compatible = "sinovoip,bpi-m2-plus", "allwinner,sun50i-h5";
+};
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 0/3] arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
[not found] ` <20180830080926.15027-1-wens-jdAy2FN1RRM@public.gmane.org>
` (2 preceding siblings ...)
2018-08-30 8:09 ` [PATCH 3/3] arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5 Chen-Yu Tsai
@ 2018-08-31 10:17 ` Maxime Ripard
2018-09-03 3:05 ` Chen-Yu Tsai
3 siblings, 1 reply; 7+ messages in thread
From: Maxime Ripard @ 2018-08-31 10:17 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
[-- Attachment #1: Type: text/plain, Size: 1289 bytes --]
On Thu, Aug 30, 2018 at 04:09:23PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> Allwinner's H5 SoC is pin compatible with the H3 SoC. As such, some
> vendors produce H3 and H5 variants for the same device. Such is the
> case with Libre Computer's ALL-H3-CC, and the Bananapi M2 Plus.
>
> This series follows that of the ALL-H3-CC, splitting out a common
> board dtsi, and then two SoC-specific dts files that include the
> SoC level and common board dtsi's, as well as putting in the board
> name. The first patch is a minor fix that I think should be done
> before the migration.
>
> Please have a look.
Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
> Also, on a related matter, Bananapi recently released revision v1.2
> of the M2 Plus. The original commercially available version was v1.1.
> v1.2 adds a GPIO control that can change the CPU cores' supply voltage
> between 1.1V and 1.3V. Do we want two extra dts files for this? Put
> them in the existing dts files regardless? Or let people handle this
> via overlays?
If that the sole change, I'd be inclined to merge it as a separate DT
for that particular version. Is there any way to detect it at runtime?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 0/3] arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
2018-08-31 10:17 ` [PATCH 0/3] " Maxime Ripard
@ 2018-09-03 3:05 ` Chen-Yu Tsai
[not found] ` <CAGb2v65+p-m90wj9MP9SP7x8xGUT2YLwJ-aiDgo9CW85YFSySg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Chen-Yu Tsai @ 2018-09-03 3:05 UTC (permalink / raw)
To: Maxime Ripard; +Cc: linux-arm-kernel, devicetree, linux-sunxi
On Fri, Aug 31, 2018 at 6:17 PM Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
>
> On Thu, Aug 30, 2018 at 04:09:23PM +0800, Chen-Yu Tsai wrote:
> > Hi,
> >
> > Allwinner's H5 SoC is pin compatible with the H3 SoC. As such, some
> > vendors produce H3 and H5 variants for the same device. Such is the
> > case with Libre Computer's ALL-H3-CC, and the Bananapi M2 Plus.
> >
> > This series follows that of the ALL-H3-CC, splitting out a common
> > board dtsi, and then two SoC-specific dts files that include the
> > SoC level and common board dtsi's, as well as putting in the board
> > name. The first patch is a minor fix that I think should be done
> > before the migration.
> >
> > Please have a look.
>
> Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
>
> > Also, on a related matter, Bananapi recently released revision v1.2
> > of the M2 Plus. The original commercially available version was v1.1.
> > v1.2 adds a GPIO control that can change the CPU cores' supply voltage
> > between 1.1V and 1.3V. Do we want two extra dts files for this? Put
> > them in the existing dts files regardless? Or let people handle this
> > via overlays?
>
> If that the sole change, I'd be inclined to merge it as a separate DT
> for that particular version. Is there any way to detect it at runtime?
It seems there isn't. The pin in both new and old revisions have an
external pull-up with the same value, so it isn't possible to detect
whether the pin is used or not. And there are no other changes between
the two.
ChenYu
^ permalink raw reply [flat|nested] 7+ messages in thread