From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: [PATCH v2 5/6] ARM: dts: sun7i: add pinmux setting for RGB888 output for LCD0 Date: Fri, 7 Sep 2018 12:19:47 +0800 Message-ID: <20180907041948.19913-6-wens@csie.org> References: <20180907041948.19913-1-wens@csie.org> Reply-To: wens-jdAy2FN1RRM@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20180907041948.19913-1-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Thierry Reding , David Airlie , Rob Herring , Mark Rutland , Maxime Ripard Cc: Chen-Yu Tsai , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Jonathan Liu List-Id: devicetree@vger.kernel.org On the A20, as well as many other Allwinner SoCs, the PD pingroup has the LCD0 RGB output functions. Add a pinmux setting for RGB888 output from LCD0, so boards and tablets with parallel RGB LCD panels may reference it. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 9c52712af241..b2c56833b0e6 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -950,6 +950,17 @@ pins = "PI20", "PI21"; function = "uart7"; }; + + lcd0_rgb888_pins: lcd0-rgb888-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD6", "PD7", "PD8", "PD9", + "PD10", "PD11", "PD12", "PD13", + "PD14", "PD15", "PD16", "PD17", + "PD18", "PD19", "PD20", "PD21", + "PD22", "PD23", "PD24", "PD25", + "PD26", "PD27"; + function = "lcd0"; + }; }; timer@1c20c00 { -- 2.19.0.rc1