From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Jens Axboe <axboe@kernel.dk>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Al Cooper <alcooperx@gmail.com>, Ray Jui <ray.jui@broadcom.com>,
Tejun Heo <tj@kernel.org>, Fengguang Wu <fengguang.wu@intel.com>,
Arnd Bergmann <arnd@arndb.de>,
"open list:LIBATA SUBSYSTEM Serial and Parallel ATA drivers"
<linux-ide@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
bcm-kernel-feedback-list@broadcom.com
Subject: [PATCH 8/9] ARM: dts: BCM63xx: enable SATA PHY and AHCI controller
Date: Thu, 20 Sep 2018 12:16:45 -0700 [thread overview]
Message-ID: <20180920191646.18198-12-f.fainelli@gmail.com> (raw)
In-Reply-To: <20180920191646.18198-1-f.fainelli@gmail.com>
Add Device Tree entries for the Broadcom AHCI and SATA PHY controller
found on BCM63138 SoCs
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm63138.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 6df61518776f..546aabc6f965 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -143,6 +143,36 @@
reg = <0x4800e0 0x10>;
#reset-cells = <2>;
};
+
+ ahci: sata@8000 {
+ compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
+ reg-names = "ahci", "top-ctrl";
+ reg = <0xa000 0x9ac>, <0x8040 0x24>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&pmb0 3 1>;
+ status = "disabled";
+
+ sata0: sata-port@0 {
+ reg = <0>;
+ phys = <&sata_phy0>;
+ };
+ };
+
+ sata_phy: sata-phy@8100 {
+ compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
+ reg = <0x8100 0x1e00>;
+ reg-names = "phy";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sata_phy0: sata-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+ };
};
/* Legacy UBUS base */
--
2.17.1
next prev parent reply other threads:[~2018-09-20 19:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-20 19:16 [PATCH 0/9] AHCI and SATA PHY support for BCM63138 Florian Fainelli
2018-09-20 19:16 ` [PATCH 1/9] dt-bindings: phy: Document BCM63138 compatible string Florian Fainelli
2018-09-20 19:16 ` [PATCH 2/9] phy: brcm-sata: allow PHY_BRCM_SATA driver to be built for DSL SoCs Florian Fainelli
2018-09-20 19:16 ` [PATCH 2/9] phy: broadcom: " Florian Fainelli
2018-09-20 19:16 ` [PATCH 3/9] phy: brcm-sata: Add BCM63138 (DSL) PHY init sequence Florian Fainelli
2018-09-20 19:16 ` [PATCH 4/9] dt-bindings: ata: Document BCM63138 compatible string Florian Fainelli
2018-09-20 19:16 ` [PATCH 5/9] ata: ahci_brcm: Allow optional reset controller to be used Florian Fainelli
2018-09-20 19:16 ` [PATCH 5/9] ata: sata_brcmstb: " Florian Fainelli
2018-09-20 19:16 ` [PATCH 6/9] ata: ahci_brcm: Match BCM63138 compatible strings Florian Fainelli
2018-09-20 19:16 ` [PATCH 6/9] ata: ahci_brcmstb: Match 63138 " Florian Fainelli
2018-09-20 19:16 ` [PATCH 7/9] ata: ahci_brcm: Allow using driver or DSL SoCs Florian Fainelli
2018-09-20 19:16 ` Florian Fainelli [this message]
2018-10-04 17:22 ` [PATCH 8/9] ARM: dts: BCM63xx: enable SATA PHY and AHCI controller Florian Fainelli
2018-09-20 19:16 ` [PATCH 9/9] ARM: bcm63138: Enable SATA AHCI and PHY Florian Fainelli
2018-10-04 17:23 ` Florian Fainelli
2018-09-20 19:19 ` [PATCH 0/9] AHCI and SATA PHY support for BCM63138 Florian Fainelli
2018-09-25 6:19 ` Kishon Vijay Abraham I
2018-09-25 16:12 ` Florian Fainelli
2018-09-28 22:41 ` Florian Fainelli
2018-09-29 8:56 ` Tejun Heo
2018-09-30 2:35 ` Jens Axboe
2018-09-30 4:22 ` Florian Fainelli
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