From mboxrd@z Thu Jan 1 00:00:00 1970 From: Florian Fainelli Subject: [PATCH 8/9] ARM: dts: BCM63xx: enable SATA PHY and AHCI controller Date: Thu, 20 Sep 2018 12:16:45 -0700 Message-ID: <20180920191646.18198-12-f.fainelli@gmail.com> References: <20180920191646.18198-1-f.fainelli@gmail.com> Return-path: In-Reply-To: <20180920191646.18198-1-f.fainelli@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Jens Axboe , Rob Herring , Mark Rutland , Kishon Vijay Abraham I , Al Cooper , Ray Jui , Tejun Heo , Fengguang Wu , Arnd Bergmann , "open list:LIBATA SUBSYSTEM Serial and Parallel ATA drivers" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , bcm-kernel-feedback-list@broadcom.com List-Id: devicetree@vger.kernel.org Add Device Tree entries for the Broadcom AHCI and SATA PHY controller found on BCM63138 SoCs Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm63138.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index 6df61518776f..546aabc6f965 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -143,6 +143,36 @@ reg = <0x4800e0 0x10>; #reset-cells = <2>; }; + + ahci: sata@8000 { + compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci"; + reg-names = "ahci", "top-ctrl"; + reg = <0xa000 0x9ac>, <0x8040 0x24>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + resets = <&pmb0 3 1>; + status = "disabled"; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy0>; + }; + }; + + sata_phy: sata-phy@8100 { + compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3"; + reg = <0x8100 0x1e00>; + reg-names = "phy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sata_phy0: sata-phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + }; }; /* Legacy UBUS base */ -- 2.17.1