From: Shawn Guo <shawnguo@kernel.org>
To: Anson Huang <Anson.Huang@nxp.com>
Cc: s.hauer@pengutronix.de, kernel@pengutronix.de,
fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com,
rjw@rjwysocki.net, viresh.kumar@linaro.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Linux-imx@nxp.com
Subject: Re: [PATCH 1/2] ARM: dts: imx6ul: use nvmem-cells for cpu speed grading
Date: Wed, 26 Sep 2018 17:15:35 +0800 [thread overview]
Message-ID: <20180926091533.GD26692@dragon> (raw)
In-Reply-To: <1536893962-11200-1-git-send-email-Anson.Huang@nxp.com>
On Fri, Sep 14, 2018 at 10:59:21AM +0800, Anson Huang wrote:
> On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
> needs to be enabled first, so use the nvmem-cells binding instead.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Applied this one, thanks.
prev parent reply other threads:[~2018-09-26 9:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 2:59 [PATCH 1/2] ARM: dts: imx6ul: use nvmem-cells for cpu speed grading Anson Huang
2018-09-14 2:59 ` [PATCH 2/2] cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull Anson Huang
2018-10-01 5:54 ` Viresh Kumar
2018-09-26 9:15 ` Shawn Guo [this message]
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