* [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board [not found] <Akash_Gajjar@mentor.com> @ 2018-09-14 12:09 ` Akash Gajjar 2018-09-14 17:53 ` Heiko Stuebner 2018-09-17 5:44 ` Rob Herring 2018-09-26 6:24 ` [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 Akash Gajjar 1 sibling, 2 replies; 9+ messages in thread From: Akash Gajjar @ 2018-09-14 12:09 UTC (permalink / raw) To: heiko-4mtYJXux2i+zQB+pC5nmwQ Cc: Mark Rutland, Shohei Maruyama, Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA, Greg Kroah-Hartman, Shawn Lin, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Masahiro Yamada, Rob Herring, Klaus Goger, Jagan Teki, Heinrich Schuchardt, Enric Balletbo i Serra, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, deepak_das-nmGgyN9QBj3QT0dZR+AlfA, Levin Du, Ezequiel Garcia, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Rockpro64 board is a rockchip RK3399 based board from pine64.org. This commit adds initial device tree support for Rockpro64 board. Signed-off-by: Akash Gajjar <Akash_Gajjar-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org> --- Documentation/devicetree/bindings/arm/rockchip.txt | 4 + arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 770 +++++++++++++++++++++ 3 files changed, 775 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index acfd3c7..ac95183 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "pine64,rock64", "rockchip,rk3328"; +- Pine64 RockPro64 board: + Required root node properties: + - compatible = "pine64,rockpro64", "rockchip,rk3399"; + - Rockchip PX3 Evaluation board: Required root node properties: - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index b0092d9..03d523a 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts new file mode 100644 index 0000000..9e2d4d9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts @@ -0,0 +1,770 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pwm/pwm.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Pine64 RockPro64"; + compatible = "pine64,rockpro64", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pwms = <&pwm0 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <100>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; + + work-led { + label = "work"; + default-state = "on"; + gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + }; + + diy-led { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + }; + }; + + rt5640-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rockchip,rt5640-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + + simple-audio-card,cpu { + sound-dai = <&i2s1>; + }; + + simple-audio-card,codec { + sound-dai = <&rt5640>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc1v8_pmu>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG2 { + regulator-name = "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-name = "vcc1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <0>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; + + rt5640: rt5640@1c { + compatible = "realtek,rt5640"; + reg = <0x1c>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + realtek,in1-differential; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&rt5640_hpcon>; + }; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + accelerometer@68 { + compatible = "invensense,mpu6500"; + reg = <0x68>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_3g_drv: pcie-3g-drv { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rt5640 { + rt5640_hpcon: rt5640-hpcon { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + work_led_gpio: work_led-gpio { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + diy_led_gpio: diy_led-gpio { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + vqmmc-supply = <&vcc_sdio>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; -- 2.7.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board 2018-09-14 12:09 ` [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board Akash Gajjar @ 2018-09-14 17:53 ` Heiko Stuebner 2018-09-15 9:03 ` agajjar 2018-09-17 5:44 ` Rob Herring 1 sibling, 1 reply; 9+ messages in thread From: Heiko Stuebner @ 2018-09-14 17:53 UTC (permalink / raw) To: Akash Gajjar Cc: deepak_das, Rob Herring, Mark Rutland, Jagan Teki, Levin Du, Ezequiel Garcia, Klaus Goger, Arnd Bergmann, Masahiro Yamada, Greg Kroah-Hartman, Shohei Maruyama, Shawn Lin, Heinrich Schuchardt, Enric Balletbo i Serra, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel Hi Akash, Am Freitag, 14. September 2018, 14:09:09 CEST schrieb Akash Gajjar: > Rockpro64 board is a rockchip RK3399 based board from pine64.org. > This commit adds initial device tree support for Rockpro64 board. > > Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> generally the patch looks great already. Hopefully we will get an Ack from the dt-maintaintainers for the binding and I noticed two small issues I'll describe below. > --- > Documentation/devicetree/bindings/arm/rockchip.txt | 4 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 770 +++++++++++++++++++++ > 3 files changed, 775 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > index acfd3c7..ac95183 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.txt > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings > Required root node properties: > - compatible = "pine64,rock64", "rockchip,rk3328"; > > +- Pine64 RockPro64 board: > + Required root node properties: > + - compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > - Rockchip PX3 Evaluation board: > Required root node properties: > - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index b0092d9..03d523a 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > new file mode 100644 > index 0000000..9e2d4d9 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > @@ -0,0 +1,770 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. Rockchip copyright from 2017? Where is the original dts coming from? > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/linux-event-codes.h> > +#include <dt-bindings/pwm/pwm.h> > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + model = "Pine64 RockPro64"; > + compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; > + pwms = <&pwm0 0 25000 0>; > + brightness-levels = < > + 0 1 2 3 4 5 6 7 > + 8 9 10 11 12 13 14 15 > + 16 17 18 19 20 21 22 23 > + 24 25 26 27 28 29 30 31 > + 32 33 34 35 36 37 38 39 > + 40 41 42 43 44 45 46 47 > + 48 49 50 51 52 53 54 55 > + 56 57 58 59 60 61 62 63 > + 64 65 66 67 68 69 70 71 > + 72 73 74 75 76 77 78 79 > + 80 81 82 83 84 85 86 87 > + 88 89 90 91 92 93 94 95 > + 96 97 98 99 100 101 102 103 > + 104 105 106 107 108 109 110 111 > + 112 113 114 115 116 117 118 119 > + 120 121 122 123 124 125 126 127 > + 128 129 130 131 132 133 134 135 > + 136 137 138 139 140 141 142 143 > + 144 145 146 147 148 149 150 151 > + 152 153 154 155 156 157 158 159 > + 160 161 162 163 164 165 166 167 > + 168 169 170 171 172 173 174 175 > + 176 177 178 179 180 181 182 183 > + 184 185 186 187 188 189 190 191 > + 192 193 194 195 196 197 198 199 > + 200 201 202 203 204 205 206 207 > + 208 209 210 211 212 213 214 215 > + 216 217 218 219 220 221 222 223 > + 224 225 226 227 228 229 230 231 > + 232 233 234 235 236 237 238 239 > + 240 241 242 243 244 245 246 247 > + 248 249 250 251 252 253 254 255>; > + default-brightness-level = <200>; with recent additions to the pwm-backlight we shouldn't need the long brightness-levels table and default-brightness-level anymore. Heiko ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board 2018-09-14 17:53 ` Heiko Stuebner @ 2018-09-15 9:03 ` agajjar 2018-09-15 18:47 ` Heiko Stuebner 0 siblings, 1 reply; 9+ messages in thread From: agajjar @ 2018-09-15 9:03 UTC (permalink / raw) To: Heiko Stuebner Cc: deepak_das, Rob Herring, Mark Rutland, Jagan Teki, Levin Du, Ezequiel Garcia, Klaus Goger, Arnd Bergmann, Masahiro Yamada, Greg Kroah-Hartman, Shohei Maruyama, Shawn Lin, Heinrich Schuchardt, Enric Balletbo i Serra, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel Hi Heiko, On 9/14/2018 11:23 PM, Heiko Stuebner wrote: > Hi Akash, > > Am Freitag, 14. September 2018, 14:09:09 CEST schrieb Akash Gajjar: >> Rockpro64 board is a rockchip RK3399 based board from pine64.org. >> This commit adds initial device tree support for Rockpro64 board. >> >> Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> > generally the patch looks great already. Hopefully we will get an Ack > from the dt-maintaintainers for the binding and I noticed two small > issues I'll describe below. > > >> --- >> Documentation/devicetree/bindings/arm/rockchip.txt | 4 + >> arch/arm64/boot/dts/rockchip/Makefile | 1 + >> arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 770 +++++++++++++++++++++ >> 3 files changed, 775 insertions(+) >> create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts >> >> diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt >> index acfd3c7..ac95183 100644 >> --- a/Documentation/devicetree/bindings/arm/rockchip.txt >> +++ b/Documentation/devicetree/bindings/arm/rockchip.txt >> @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings >> Required root node properties: >> - compatible = "pine64,rock64", "rockchip,rk3328"; >> >> +- Pine64 RockPro64 board: >> + Required root node properties: >> + - compatible = "pine64,rockpro64", "rockchip,rk3399"; >> + >> - Rockchip PX3 Evaluation board: >> Required root node properties: >> - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; >> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile >> index b0092d9..03d523a 100644 >> --- a/arch/arm64/boot/dts/rockchip/Makefile >> +++ b/arch/arm64/boot/dts/rockchip/Makefile >> @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb >> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts >> new file mode 100644 >> index 0000000..9e2d4d9 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts >> @@ -0,0 +1,770 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >> +/* >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. > Rockchip copyright from 2017? Where is the original > dts coming from? Rockpro64 board is similar to firefly rk-3399 board. DTS is taken from firefly board and it is booting fine with minimal changes. Should I continue with the rockchip rights or update with the mine copy rights? >> + */ >> + >> +/dts-v1/; >> +#include <dt-bindings/input/linux-event-codes.h> >> +#include <dt-bindings/pwm/pwm.h> >> +#include "rk3399.dtsi" >> +#include "rk3399-opp.dtsi" >> + >> +/ { >> + model = "Pine64 RockPro64"; >> + compatible = "pine64,rockpro64", "rockchip,rk3399"; >> + >> + chosen { >> + stdout-path = "serial2:1500000n8"; >> + }; >> + >> + backlight: backlight { >> + compatible = "pwm-backlight"; >> + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; >> + pwms = <&pwm0 0 25000 0>; >> + brightness-levels = < >> + 0 1 2 3 4 5 6 7 >> + 8 9 10 11 12 13 14 15 >> + 16 17 18 19 20 21 22 23 >> + 24 25 26 27 28 29 30 31 >> + 32 33 34 35 36 37 38 39 >> + 40 41 42 43 44 45 46 47 >> + 48 49 50 51 52 53 54 55 >> + 56 57 58 59 60 61 62 63 >> + 64 65 66 67 68 69 70 71 >> + 72 73 74 75 76 77 78 79 >> + 80 81 82 83 84 85 86 87 >> + 88 89 90 91 92 93 94 95 >> + 96 97 98 99 100 101 102 103 >> + 104 105 106 107 108 109 110 111 >> + 112 113 114 115 116 117 118 119 >> + 120 121 122 123 124 125 126 127 >> + 128 129 130 131 132 133 134 135 >> + 136 137 138 139 140 141 142 143 >> + 144 145 146 147 148 149 150 151 >> + 152 153 154 155 156 157 158 159 >> + 160 161 162 163 164 165 166 167 >> + 168 169 170 171 172 173 174 175 >> + 176 177 178 179 180 181 182 183 >> + 184 185 186 187 188 189 190 191 >> + 192 193 194 195 196 197 198 199 >> + 200 201 202 203 204 205 206 207 >> + 208 209 210 211 212 213 214 215 >> + 216 217 218 219 220 221 222 223 >> + 224 225 226 227 228 229 230 231 >> + 232 233 234 235 236 237 238 239 >> + 240 241 242 243 244 245 246 247 >> + 248 249 250 251 252 253 254 255>; >> + default-brightness-level = <200>; > with recent additions to the pwm-backlight we shouldn't need the > long brightness-levels table and default-brightness-level anymore. some device support is also needs to be added in this dts. In upcoming patch-sets I will update those changes. > > > Heiko > warm Regards, Akash Gajjar ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board 2018-09-15 9:03 ` agajjar @ 2018-09-15 18:47 ` Heiko Stuebner 0 siblings, 0 replies; 9+ messages in thread From: Heiko Stuebner @ 2018-09-15 18:47 UTC (permalink / raw) To: agajjar, Enric Balletbo i Serra Cc: deepak_das, Rob Herring, Mark Rutland, Jagan Teki, Levin Du, Ezequiel Garcia, Klaus Goger, Arnd Bergmann, Masahiro Yamada, Greg Kroah-Hartman, Shohei Maruyama, Shawn Lin, Heinrich Schuchardt, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel Am Samstag, 15. September 2018, 11:03:57 CEST schrieb agajjar: > Hi Heiko, > > On 9/14/2018 11:23 PM, Heiko Stuebner wrote: > > Hi Akash, > > > > Am Freitag, 14. September 2018, 14:09:09 CEST schrieb Akash Gajjar: > >> Rockpro64 board is a rockchip RK3399 based board from pine64.org. > >> This commit adds initial device tree support for Rockpro64 board. > >> > >> Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> > > generally the patch looks great already. Hopefully we will get an Ack > > from the dt-maintaintainers for the binding and I noticed two small > > issues I'll describe below. > > > > > >> --- > >> Documentation/devicetree/bindings/arm/rockchip.txt | 4 + > >> arch/arm64/boot/dts/rockchip/Makefile | 1 + > >> arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 770 +++++++++++++++++++++ > >> 3 files changed, 775 insertions(+) > >> create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > >> > >> diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > >> index acfd3c7..ac95183 100644 > >> --- a/Documentation/devicetree/bindings/arm/rockchip.txt > >> +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > >> @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings > >> Required root node properties: > >> - compatible = "pine64,rock64", "rockchip,rk3328"; > >> > >> +- Pine64 RockPro64 board: > >> + Required root node properties: > >> + - compatible = "pine64,rockpro64", "rockchip,rk3399"; > >> + > >> - Rockchip PX3 Evaluation board: > >> Required root node properties: > >> - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; > >> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > >> index b0092d9..03d523a 100644 > >> --- a/arch/arm64/boot/dts/rockchip/Makefile > >> +++ b/arch/arm64/boot/dts/rockchip/Makefile > >> @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb > >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > >> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb > >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb > >> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb > >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > >> new file mode 100644 > >> index 0000000..9e2d4d9 > >> --- /dev/null > >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > >> @@ -0,0 +1,770 @@ > >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > >> +/* > >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. > > Rockchip copyright from 2017? Where is the original > > dts coming from? > > Rockpro64 board is similar to firefly rk-3399 board. DTS is taken from > firefly board and it is booting fine with minimal changes. > > Should I continue with the rockchip rights or update with the mine copy > rights? I guess, you could keep the old one and add a second line for 2018 and your copyright, as you also added changes to it. > >> + */ > >> + > >> +/dts-v1/; > >> +#include <dt-bindings/input/linux-event-codes.h> > >> +#include <dt-bindings/pwm/pwm.h> > >> +#include "rk3399.dtsi" > >> +#include "rk3399-opp.dtsi" > >> + > >> +/ { > >> + model = "Pine64 RockPro64"; > >> + compatible = "pine64,rockpro64", "rockchip,rk3399"; > >> + > >> + chosen { > >> + stdout-path = "serial2:1500000n8"; > >> + }; > >> + > >> + backlight: backlight { > >> + compatible = "pwm-backlight"; > >> + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; > >> + pwms = <&pwm0 0 25000 0>; > >> + brightness-levels = < > >> + 0 1 2 3 4 5 6 7 > >> + 8 9 10 11 12 13 14 15 > >> + 16 17 18 19 20 21 22 23 > >> + 24 25 26 27 28 29 30 31 > >> + 32 33 34 35 36 37 38 39 > >> + 40 41 42 43 44 45 46 47 > >> + 48 49 50 51 52 53 54 55 > >> + 56 57 58 59 60 61 62 63 > >> + 64 65 66 67 68 69 70 71 > >> + 72 73 74 75 76 77 78 79 > >> + 80 81 82 83 84 85 86 87 > >> + 88 89 90 91 92 93 94 95 > >> + 96 97 98 99 100 101 102 103 > >> + 104 105 106 107 108 109 110 111 > >> + 112 113 114 115 116 117 118 119 > >> + 120 121 122 123 124 125 126 127 > >> + 128 129 130 131 132 133 134 135 > >> + 136 137 138 139 140 141 142 143 > >> + 144 145 146 147 148 149 150 151 > >> + 152 153 154 155 156 157 158 159 > >> + 160 161 162 163 164 165 166 167 > >> + 168 169 170 171 172 173 174 175 > >> + 176 177 178 179 180 181 182 183 > >> + 184 185 186 187 188 189 190 191 > >> + 192 193 194 195 196 197 198 199 > >> + 200 201 202 203 204 205 206 207 > >> + 208 209 210 211 212 213 214 215 > >> + 216 217 218 219 220 221 222 223 > >> + 224 225 226 227 228 229 230 231 > >> + 232 233 234 235 236 237 238 239 > >> + 240 241 242 243 244 245 246 247 > >> + 248 249 250 251 252 253 254 255>; > >> + default-brightness-level = <200>; > > with recent additions to the pwm-backlight we shouldn't need the > > long brightness-levels table and default-brightness-level anymore. > some device support is also needs to be added in this dts. In upcoming > patch-sets I will update those changes. cool, thanks. Heiko ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board 2018-09-14 12:09 ` [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board Akash Gajjar 2018-09-14 17:53 ` Heiko Stuebner @ 2018-09-17 5:44 ` Rob Herring 1 sibling, 0 replies; 9+ messages in thread From: Rob Herring @ 2018-09-17 5:44 UTC (permalink / raw) To: Akash Gajjar Cc: heiko, deepak_das, Mark Rutland, Jagan Teki, Levin Du, Ezequiel Garcia, Klaus Goger, Arnd Bergmann, Masahiro Yamada, Greg Kroah-Hartman, Shohei Maruyama, Shawn Lin, Heinrich Schuchardt, Enric Balletbo i Serra, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Fri, Sep 14, 2018 at 05:39:09PM +0530, Akash Gajjar wrote: > Rockpro64 board is a rockchip RK3399 based board from pine64.org. > This commit adds initial device tree support for Rockpro64 board. > > Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> > --- > Documentation/devicetree/bindings/arm/rockchip.txt | 4 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 770 +++++++++++++++++++++ > 3 files changed, 775 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > index acfd3c7..ac95183 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.txt > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings > Required root node properties: > - compatible = "pine64,rock64", "rockchip,rk3328"; > > +- Pine64 RockPro64 board: > + Required root node properties: > + - compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > - Rockchip PX3 Evaluation board: > Required root node properties: > - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index b0092d9..03d523a 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > new file mode 100644 > index 0000000..9e2d4d9 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > @@ -0,0 +1,770 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/linux-event-codes.h> > +#include <dt-bindings/pwm/pwm.h> > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + model = "Pine64 RockPro64"; > + compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; > + pwms = <&pwm0 0 25000 0>; > + brightness-levels = < > + 0 1 2 3 4 5 6 7 > + 8 9 10 11 12 13 14 15 > + 16 17 18 19 20 21 22 23 There's a binding now so you don't have to list every single entry. Rob ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 [not found] <Akash_Gajjar@mentor.com> 2018-09-14 12:09 ` [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board Akash Gajjar @ 2018-09-26 6:24 ` Akash Gajjar 2018-09-26 9:44 ` Deepak Das ` (2 more replies) 1 sibling, 3 replies; 9+ messages in thread From: Akash Gajjar @ 2018-09-26 6:24 UTC (permalink / raw) To: heiko-4mtYJXux2i+zQB+pC5nmwQ Cc: Mark Rutland, Shohei Maruyama, Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA, Greg Kroah-Hartman, Shawn Lin, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Masahiro Yamada, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring, Klaus Goger, Philippe Ombredanne, Enric Balletbo i Serra, Pragnesh_patel-nmGgyN9QBj3QT0dZR+AlfA, Deepak_das-nmGgyN9QBj3QT0dZR+AlfA, Levin Du, Ezequiel Garcia, Pierre-Hugues Husson, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Rockpro64 is a rockchip RK3399 based board from pine64.org. This patch adds basic device node support for Rockpro64 board and make it able to bring up. Peripheral Works - Sdcard - USB 2.0, 3.0 - Leds - Ethernet - Debug console Not working: - USB Type-C Signed-off-by: Akash Gajjar <Akash_Gajjar-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org> --- changes for v2 - Added support for usb 2.0, 3.0 - Added fusb302 node and its regulator support - Cleanup pinctrl node - Remove backlight, pcie, sound codec node inherited from firefly-rk3399 dts changes for v3 - Added copyright properly - Typo correction in commit message Documentation/devicetree/bindings/arm/rockchip.txt | 4 + arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 692 +++++++++++++++++++++ 3 files changed, 697 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index acfd3c7..ac95183 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "pine64,rock64", "rockchip,rk3328"; +- Pine64 RockPro64 board: + Required root node properties: + - compatible = "pine64,rockpro64", "rockchip,rk3399"; + - Rockchip PX3 Evaluation board: Required root node properties: - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index b0092d9..03d523a 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts new file mode 100644 index 0000000..1d35f54 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts @@ -0,0 +1,692 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org> + */ + +/dts-v1/; +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pwm/pwm.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "Pine64 RockPro64"; + compatible = "pine64,rockpro64", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <100>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; + + work-led { + label = "work"; + default-state = "on"; + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + }; + + diy-led { + label = "diy"; + default-state = "off"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwr_en>; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; + + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + vin-supply = <&vcc_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc1v8_pmu>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG2 { + regulator-name = "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-name = "vcc1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <0>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb0: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + vbus-supply = <&vcc5v0_typec>; + status = "okay"; + }; +}; + +&i2s0 { + rockchip,playback-channels = <8>; + rockchip,capture-channels = <8>; + status = "okay"; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + bt656-supply = <&vcc1v8_dvp>; + audio-supply = <&vcca1v8_codec>; + sdmmc-supply = <&vcc_sdio>; + gpio1830-supply = <&vcc_3v0>; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + fusb302x { + fusb0_int: fusb0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + work_led_gpio: work_led-gpio { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + diy_led_gpio: diy_led-gpio { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_pwr_en: pcie-pwr-en { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0_typec_en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "otg"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 2018-09-26 6:24 ` [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 Akash Gajjar @ 2018-09-26 9:44 ` Deepak Das 2018-09-26 11:35 ` Heiko Stuebner 2018-09-27 20:02 ` Rob Herring 2 siblings, 0 replies; 9+ messages in thread From: Deepak Das @ 2018-09-26 9:44 UTC (permalink / raw) To: Akash Gajjar, heiko Cc: Pragnesh_patel, Rob Herring, Mark Rutland, Levin Du, Klaus Goger, Ezequiel Garcia, Arnd Bergmann, Masahiro Yamada, Philippe Ombredanne, Greg Kroah-Hartman, Shohei Maruyama, Pierre-Hugues Husson, Enric Balletbo i Serra, Shawn Lin, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Wednesday 26 September 2018 11:54 AM, Akash Gajjar wrote: > Rockpro64 is a rockchip RK3399 based board from pine64.org. > This patch adds basic device node support for Rockpro64 board and make it able > to bring up. > > Peripheral Works > - Sdcard > - USB 2.0, 3.0 > - Leds > - Ethernet > - Debug console > > Not working: > - USB Type-C > > Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> > --- > changes for v2 > - Added support for usb 2.0, 3.0 > - Added fusb302 node and its regulator support > - Cleanup pinctrl node > - Remove backlight, pcie, sound codec node inherited from firefly-rk3399 dts > changes for v3 > - Added copyright properly > - Typo correction in commit message > > Documentation/devicetree/bindings/arm/rockchip.txt | 4 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 692 +++++++++++++++++++++ > 3 files changed, 697 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > Acked-by: Deepak Das <Deepak_Das@mentor.com> > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > index acfd3c7..ac95183 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.txt > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > @@ -160,6 +160,10 @@ Rockchip platforms device tree bindings > Required root node properties: > - compatible = "pine64,rock64", "rockchip,rk3328"; > > +- Pine64 RockPro64 board: > + Required root node properties: > + - compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > - Rockchip PX3 Evaluation board: > Required root node properties: > - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index b0092d9..03d523a 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -14,5 +14,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > new file mode 100644 > index 0000000..1d35f54 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > @@ -0,0 +1,692 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. > + * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com> > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/linux-event-codes.h> > +#include <dt-bindings/pwm/pwm.h> > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + model = "Pine64 RockPro64"; > + compatible = "pine64,rockpro64", "rockchip,rk3399"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + clkin_gmac: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "clkin_gmac"; > + #clock-cells = <0>; > + }; > + > + dc_12v: dc-12v { > + compatible = "regulator-fixed"; > + regulator-name = "dc_12v"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + autorepeat; > + pinctrl-names = "default"; > + pinctrl-0 = <&pwrbtn>; > + > + power { > + debounce-interval = <100>; > + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; > + label = "GPIO Key Power"; > + linux,code = <KEY_POWER>; > + wakeup-source; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; > + > + work-led { > + label = "work"; > + default-state = "on"; > + gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; > + }; > + > + diy-led { > + label = "diy"; > + default-state = "off"; > + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + clocks = <&rk808 1>; > + clock-names = "ext_clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&wifi_enable_h>; > + > + /* > + * On the module itself this is one of these (depending > + * on the actual card populated): > + * - SDIO_RESET_L_WL_REG_ON > + * - PDN (power down when low) > + */ > + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; > + }; > + > + /* switched by pmic_sleep */ > + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc1v8_s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + vin-supply = <&vcc_1v8>; > + }; > + > + vcc3v3_pcie: vcc3v3-pcie-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_pwr_en>; > + regulator-name = "vcc3v3_pcie"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&dc_12v>; > + }; > + > + vcc3v3_sys: vcc3v3-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_sys>; > + }; > + > + /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ > + vcc5v0_host: vcc5v0-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_host_en>; > + regulator-name = "vcc5v0_host"; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc5v0_typec: vcc5v0-typec-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_typec_en>; > + regulator-name = "vcc5v0_typec"; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vdd_log: vdd-log { > + compatible = "pwm-regulator"; > + pwms = <&pwm2 0 25000 1>; > + regulator-name = "vdd_log"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + vin-supply = <&vcc_sys>; > + }; > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&gmac { > + assigned-clocks = <&cru SCLK_RMII_SRC>; > + assigned-clock-parents = <&clkin_gmac>; > + clock_in_out = "input"; > + phy-supply = <&vcc_lan>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii_pins>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + tx_delay = <0x28>; > + rx_delay = <0x11>; > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + rk808: pmic@1b { > + compatible = "rockchip,rk808"; > + reg = <0x1b>; > + interrupt-parent = <&gpio1>; > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + clock-output-names = "xin32k", "rk808-clkout2"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>; > + rockchip,system-power-controller; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc6-supply = <&vcc_sys>; > + vcc7-supply = <&vcc_sys>; > + vcc8-supply = <&vcc3v3_sys>; > + vcc9-supply = <&vcc_sys>; > + vcc10-supply = <&vcc_sys>; > + vcc11-supply = <&vcc_sys>; > + vcc12-supply = <&vcc3v3_sys>; > + vddio-supply = <&vcc1v8_pmu>; > + > + regulators { > + vdd_center: DCDC_REG1 { > + regulator-name = "vdd_center"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_cpu_l: DCDC_REG2 { > + regulator-name = "vdd_cpu_l"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <750000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v8: DCDC_REG4 { > + regulator-name = "vcc_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc1v8_dvp: LDO_REG1 { > + regulator-name = "vcc1v8_dvp"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc2v8_dvp: LDO_REG2 { > + regulator-name = "vcc2v8_dvp"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc1v8_pmu: LDO_REG3 { > + regulator-name = "vcc1v8_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc_sdio: LDO_REG4 { > + regulator-name = "vcc_sdio"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3000000>; > + }; > + }; > + > + vcca3v0_codec: LDO_REG5 { > + regulator-name = "vcca3v0_codec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v5: LDO_REG6 { > + regulator-name = "vcc_1v5"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1500000>; > + }; > + }; > + > + vcca1v8_codec: LDO_REG7 { > + regulator-name = "vcca1v8_codec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_3v0: LDO_REG8 { > + regulator-name = "vcc_3v0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3000000>; > + }; > + }; > + > + vcc3v3_s3: vcc_lan: SWITCH_REG1 { > + regulator-name = "vcc3v3_s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_s0: SWITCH_REG2 { > + regulator-name = "vcc3v3_s0"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > + > + vdd_cpu_b: regulator@40 { > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <0>; > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: regulator@41 { > + compatible = "silergy,syr828"; > + reg = <0x41>; > + fcs,suspend-voltage-selector = <1>; > + regulator-name = "vdd_gpu"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > +}; > + > +&i2c1 { > + i2c-scl-rising-time-ns = <300>; > + i2c-scl-falling-time-ns = <15>; > + status = "okay"; > +}; > + > +&i2c3 { > + i2c-scl-rising-time-ns = <450>; > + i2c-scl-falling-time-ns = <15>; > + status = "okay"; > +}; > + > +&i2c4 { > + i2c-scl-rising-time-ns = <600>; > + i2c-scl-falling-time-ns = <20>; > + status = "okay"; > + > + fusb0: typec-portc@22 { > + compatible = "fcs,fusb302"; > + reg = <0x22>; > + interrupt-parent = <&gpio1>; > + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&fusb0_int>; > + vbus-supply = <&vcc5v0_typec>; > + status = "okay"; > + }; > +}; > + > +&i2s0 { > + rockchip,playback-channels = <8>; > + rockchip,capture-channels = <8>; > + status = "okay"; > +}; > + > +&i2s1 { > + rockchip,playback-channels = <2>; > + rockchip,capture-channels = <2>; > + status = "okay"; > +}; > + > +&i2s2 { > + status = "okay"; > +}; > + > +&io_domains { > + status = "okay"; > + > + bt656-supply = <&vcc1v8_dvp>; > + audio-supply = <&vcca1v8_codec>; > + sdmmc-supply = <&vcc_sdio>; > + gpio1830-supply = <&vcc_3v0>; > +}; > + > +&pmu_io_domains { > + pmu1830-supply = <&vcc_3v0>; > + status = "okay"; > +}; > + > +&pinctrl { > + buttons { > + pwrbtn: pwrbtn { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + fusb302x { > + fusb0_int: fusb0-int { > + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + leds { > + work_led_gpio: work_led-gpio { > + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + diy_led_gpio: diy_led-gpio { > + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + lcd-panel { > + lcd_panel_reset: lcd-panel-reset { > + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + pcie { > + pcie_pwr_en: pcie-pwr-en { > + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + vsel1_gpio: vsel1-gpio { > + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + > + vsel2_gpio: vsel2-gpio { > + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; > + > + sdio-pwrseq { > + wifi_enable_h: wifi-enable-h { > + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + usb-typec { > + vcc5v0_typec_en: vcc5v0_typec_en { > + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb2 { > + vcc5v0_host_en: vcc5v0-host-en { > + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pwm0 { > + status = "okay"; > +}; > + > +&pwm2 { > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcca1v8_s3>; > + status = "okay"; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; > + disable-wp; > + max-frequency = <150000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + mmc-hs400-1_8v; > + mmc-hs400-enhanced-strobe; > + non-removable; > + status = "okay"; > +}; > + > +&tcphy0 { > + status = "okay"; > +}; > + > +&tcphy1 { > + status = "okay"; > +}; > + > +&tsadc { > + /* tshut mode 0:CRU 1:GPIO */ > + rockchip,hw-tshut-mode = <1>; > + /* tshut polarity 0:LOW 1:HIGH */ > + rockchip,hw-tshut-polarity = <1>; > + status = "okay"; > +}; > + > +&u2phy0 { > + status = "okay"; > + > + u2phy0_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy0_host: host-port { > + phy-supply = <&vcc5v0_host>; > + status = "okay"; > + }; > +}; > + > +&u2phy1 { > + status = "okay"; > + > + u2phy1_otg: otg-port { > + status = "okay"; > + }; > + > + u2phy1_host: host-port { > + phy-supply = <&vcc5v0_host>; > + status = "okay"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_xfer &uart0_cts>; > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb_host1_ehci { > + status = "okay"; > +}; > + > +&usb_host1_ohci { > + status = "okay"; > +}; > + > +&usbdrd3_0 { > + status = "okay"; > +}; > + > +&usbdrd_dwc3_0 { > + status = "okay"; > + dr_mode = "otg"; > +}; > + > +&usbdrd3_1 { > + status = "okay"; > +}; > + > +&usbdrd_dwc3_1 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&vopb { > + status = "okay"; > +}; > + > +&vopb_mmu { > + status = "okay"; > +}; > + > +&vopl { > + status = "okay"; > +}; > + > +&vopl_mmu { > + status = "okay"; > +}; > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 2018-09-26 6:24 ` [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 Akash Gajjar 2018-09-26 9:44 ` Deepak Das @ 2018-09-26 11:35 ` Heiko Stuebner 2018-09-27 20:02 ` Rob Herring 2 siblings, 0 replies; 9+ messages in thread From: Heiko Stuebner @ 2018-09-26 11:35 UTC (permalink / raw) To: Akash Gajjar Cc: Deepak_das, Pragnesh_patel, Rob Herring, Mark Rutland, Levin Du, Klaus Goger, Ezequiel Garcia, Arnd Bergmann, Masahiro Yamada, Philippe Ombredanne, Greg Kroah-Hartman, Shohei Maruyama, Pierre-Hugues Husson, Enric Balletbo i Serra, Shawn Lin, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel Am Mittwoch, 26. September 2018, 08:24:57 CEST schrieb Akash Gajjar: > Rockpro64 is a rockchip RK3399 based board from pine64.org. > This patch adds basic device node support for Rockpro64 board and make it able > to bring up. > > Peripheral Works > - Sdcard > - USB 2.0, 3.0 > - Leds > - Ethernet > - Debug console > > Not working: > - USB Type-C > > Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> applied for 4.20. For future patches, please keep in mind to transfer received tags from one version to the next. v2 received a "Reviewed-by" from Rob, so ideally it should have been included below your Signed-off in v3. I've picked that tag myself from v2, so no need to do anything now, just for the next time ;-) Thanks Heiko ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 2018-09-26 6:24 ` [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 Akash Gajjar 2018-09-26 9:44 ` Deepak Das 2018-09-26 11:35 ` Heiko Stuebner @ 2018-09-27 20:02 ` Rob Herring 2 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2018-09-27 20:02 UTC (permalink / raw) To: Akash Gajjar Cc: heiko, Deepak_das, Pragnesh_patel, Rob Herring, Mark Rutland, Levin Du, Klaus Goger, Ezequiel Garcia, Arnd Bergmann, Masahiro Yamada, Philippe Ombredanne, Greg Kroah-Hartman, Shohei Maruyama, Pierre-Hugues Husson, Enric Balletbo i Serra, Shawn Lin, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Wed, 26 Sep 2018 11:54:57 +0530, Akash Gajjar wrote: > Rockpro64 is a rockchip RK3399 based board from pine64.org. > This patch adds basic device node support for Rockpro64 board and make it able > to bring up. > > Peripheral Works > - Sdcard > - USB 2.0, 3.0 > - Leds > - Ethernet > - Debug console > > Not working: > - USB Type-C > > Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> > --- > changes for v2 > - Added support for usb 2.0, 3.0 > - Added fusb302 node and its regulator support > - Cleanup pinctrl node > - Remove backlight, pcie, sound codec node inherited from firefly-rk3399 dts > changes for v3 > - Added copyright properly > - Typo correction in commit message > > Documentation/devicetree/bindings/arm/rockchip.txt | 4 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 692 +++++++++++++++++++++ > 3 files changed, 697 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-09-27 20:02 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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[not found] <Akash_Gajjar@mentor.com>
2018-09-14 12:09 ` [PATCH] arm64: dts: rockchip: add initial dts support for Rockpro64 board Akash Gajjar
2018-09-14 17:53 ` Heiko Stuebner
2018-09-15 9:03 ` agajjar
2018-09-15 18:47 ` Heiko Stuebner
2018-09-17 5:44 ` Rob Herring
2018-09-26 6:24 ` [PATCH v3] arm64: dts: rockchip: add initial dts support for Rockpro64 Akash Gajjar
2018-09-26 9:44 ` Deepak Das
2018-09-26 11:35 ` Heiko Stuebner
2018-09-27 20:02 ` Rob Herring
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