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From: Yasha Cherikovsky <yasha.che3@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-mips@linux-mips.org, devicetree@vger.kernel.org
Cc: Yasha Cherikovsky <yasha.che3@gmail.com>, linux-kernel@vger.kernel.org
Subject: [RFC v2 2/7] dt-binding: interrupt-controller: Document RTL8186 SoC DT bindings
Date: Mon,  1 Oct 2018 13:29:47 +0300	[thread overview]
Message-ID: <20181001102952.7913-3-yasha.che3@gmail.com> (raw)
In-Reply-To: <20181001102952.7913-1-yasha.che3@gmail.com>

This patch adds device tree binding doc for the
Realtek RTL8186 SoC interrupt controller.

Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
---
 .../interrupt-controller/realtek,rtl8186-intc  | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtl8186-intc

diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl8186-intc b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl8186-intc
new file mode 100644
index 000000000000..21956d210021
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl8186-intc
@@ -0,0 +1,18 @@
+Realtek RTL8186 SoC interrupt controller
+
+Required properties:
+
+- compatible : should be "realtek,rtl8186-intc"
+- interrupt-controller : Identifies the node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- reg : Specifies base physical address and size of the registers.
+
+Example:
+
+intc: interrupt-controller@1d010000 {
+	compatible = "realtek,rtl8186-intc";
+	interrupt-controller;
+	#interrupt-cells = <1>;
+	reg = <0x1d010000 0x8>;
+};
-- 
2.19.0

  parent reply	other threads:[~2018-10-01 10:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-01 10:29 [RFC v2 0/7] MIPS: Lexra LX5280 CPU + Realtek RTL8186 SoC support Yasha Cherikovsky
2018-10-01 10:29 ` [RFC v2 1/7] MIPS: Add support for the Lexra LX5280 CPU Yasha Cherikovsky
2018-11-13 16:33   ` Maciej W. Rozycki
2018-10-01 10:29 ` Yasha Cherikovsky [this message]
2018-10-12 20:13   ` [RFC v2 2/7] dt-binding: interrupt-controller: Document RTL8186 SoC DT bindings Rob Herring
2018-10-13 19:42     ` Yasha Cherikovsky
2018-10-01 10:29 ` [RFC v2 3/7] irqchip/rtl8186: Add RTL8186 interrupt controller driver Yasha Cherikovsky
2018-10-01 10:47   ` Marc Zyngier
2018-10-01 10:29 ` [RFC v2 4/7] dt-binding: timer: Document RTL8186 SoC DT bindings Yasha Cherikovsky
2018-10-12 20:14   ` Rob Herring
2018-10-01 10:29 ` [RFC v2 5/7] clocksource/drivers/rtl8186: Add RTL8186 timer driver Yasha Cherikovsky
2018-11-18  1:39   ` Daniel Lezcano
2018-10-01 10:29 ` [RFC v2 6/7] dt-binding: mips: Document Realtek SoC DT bindings Yasha Cherikovsky
2018-10-12 20:15   ` Rob Herring
2018-10-01 10:29 ` [RFC v2 7/7] MIPS: Add Realtek RTL8186 SoC support Yasha Cherikovsky

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