From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 04/15] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Date: Wed, 24 Oct 2018 19:06:32 +0100 Message-ID: <20181024180632.zrb3lrqsznspmwbk@flea> References: <20181023155035.9101-1-jagan@amarulasolutions.com> <20181023155035.9101-5-jagan@amarulasolutions.com> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="aitkqvf7qrxfcgwr" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20181023155035.9101-5-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jagan Teki Cc: Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Vasily Khoruzhick , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Michael Turquette , Stephen Boyd , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Michael Trimarchi , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --aitkqvf7qrxfcgwr Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Tue, Oct 23, 2018 at 09:20:24PM +0530, Jagan Teki wrote: > The MIPI DSI controller on Allwinner A64 is similar to > Allwinner A31 without support of DSI mod clock(CLK_DSI_SCLK) > > So, alter has_mod_clk bool via driver data for respective > SoC's compatible. > > Signed-off-by: Jagan Teki > --- > Changes for v2: > - none > > drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 47 ++++++++++++++++++++------ > drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 5 +++ > 2 files changed, 41 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c > index e3b34a345546..8e9c76febca2 100644 > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -981,6 +982,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev) > dsi->host.ops = &sun6i_dsi_host_ops; > dsi->host.dev = dev; > > + dsi->variant = of_device_get_match_data(dev); > + > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > base = devm_ioremap_resource(dev, res); > if (IS_ERR(base)) { > @@ -1001,17 +1004,20 @@ static int sun6i_dsi_probe(struct platform_device *pdev) > return PTR_ERR(dsi->reset); > } > > - dsi->mod_clk = devm_clk_get(dev, "mod"); > - if (IS_ERR(dsi->mod_clk)) { > - dev_err(dev, "Couldn't get the DSI mod clock\n"); > - return PTR_ERR(dsi->mod_clk); > + if (dsi->variant->has_mod_clk) { > + dsi->mod_clk = devm_clk_get(dev, "mod"); > + if (IS_ERR(dsi->mod_clk)) { > + dev_err(dev, "Couldn't get the DSI mod clock\n"); > + return PTR_ERR(dsi->mod_clk); > + } > } > > /* > * In order to operate properly, that clock seems to be always > * set to 297MHz. > */ > - clk_set_rate_exclusive(dsi->mod_clk, 297000000); > + if (dsi->variant->has_mod_clk) > + clk_set_rate_exclusive(dsi->mod_clk, 297000000); > > dphy_node = of_parse_phandle(dev->of_node, "phys", 0); > ret = sun6i_dphy_probe(dsi, dphy_node); > @@ -1043,7 +1049,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev) > pm_runtime_disable(dev); > sun6i_dphy_remove(dsi); > err_unprotect_clk: > - clk_rate_exclusive_put(dsi->mod_clk); > + if (dsi->variant->has_mod_clk) > + clk_rate_exclusive_put(dsi->mod_clk); > return ret; > } > > @@ -1056,7 +1063,8 @@ static int sun6i_dsi_remove(struct platform_device *pdev) > mipi_dsi_host_unregister(&dsi->host); > pm_runtime_disable(dev); > sun6i_dphy_remove(dsi); > - clk_rate_exclusive_put(dsi->mod_clk); > + if (dsi->variant->has_mod_clk) > + clk_rate_exclusive_put(dsi->mod_clk); > > return 0; > } > @@ -1066,7 +1074,8 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev) > struct sun6i_dsi *dsi = dev_get_drvdata(dev); > > reset_control_deassert(dsi->reset); > - clk_prepare_enable(dsi->mod_clk); > + if (dsi->variant->has_mod_clk) > + clk_prepare_enable(dsi->mod_clk); > > /* > * Enable the DSI block. > @@ -1094,7 +1103,8 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev) > { > struct sun6i_dsi *dsi = dev_get_drvdata(dev); > > - clk_disable_unprepare(dsi->mod_clk); > + if (dsi->variant->has_mod_clk) > + clk_disable_unprepare(dsi->mod_clk); > reset_control_assert(dsi->reset); > > return 0; > @@ -1106,9 +1116,24 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = { > NULL) > }; > > +static const struct sun6i_dsi_variant sun6i_a31_dsi = { > + .has_mod_clk = true, > +}; > + > +static const struct sun6i_dsi_variant sun50i_a64_dsi = { > + .has_mod_clk = false, This is the default already. > +}; > + > static const struct of_device_id sun6i_dsi_of_table[] = { > - { .compatible = "allwinner,sun6i-a31-mipi-dsi" }, > - { } > + { > + .compatible = "allwinner,sun6i-a31-mipi-dsi", > + .data = &sun6i_a31_dsi, > + }, > + { > + .compatible = "allwinner,sun50i-a64-mipi-dsi", > + .data = &sun50i_a64_dsi, > + }, > + { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table); > > diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > index dbbc5b3ecbda..597b62227019 100644 > --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h > @@ -20,6 +20,10 @@ struct sun6i_dphy { > struct reset_control *reset; > }; > > +struct sun6i_dsi_variant { > + bool has_mod_clk; > +}; > + This should be part of a separate patch. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --aitkqvf7qrxfcgwr--