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From: Thierry Reding <thierry.reding@gmail.com>
To: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Devicetree List <devicetree@vger.kernel.org>,
	Greg KH <gregkh@linuxfoundation.org>,
	mliljeberg@nvidia.com, Mikko Perttunen <mperttunen@nvidia.com>,
	talho@nvidia.com, linux-serial@vger.kernel.org, jslaby@suse.com,
	linux-tegra@vger.kernel.org, ppessi@nvidia.com,
	Jon Hunter <jonathanh@nvidia.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 01/10] mailbox: Support blocking transfers in atomic context
Date: Tue, 20 Nov 2018 16:29:07 +0100	[thread overview]
Message-ID: <20181120152907.GA28796@ulmo> (raw)
In-Reply-To: <CABb+yY3HwvG6sSKnweiDpyg85Fk8Q9hOVaF-s7gv4RDzEoaGqA@mail.gmail.com>


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On Sat, Nov 17, 2018 at 11:27:17AM -0600, Jassi Brar wrote:
> On Mon, Nov 12, 2018 at 9:18 AM Thierry Reding <thierry.reding@gmail.com> wrote:
> >
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The mailbox framework supports blocking transfers via completions for
> > clients that can sleep. In order to support blocking transfers in cases
> > where the transmission is not permitted to sleep, add a new ->flush()
> > callback that controller drivers can implement to busy loop until the
> > transmission has been completed. This will automatically be called when
> > available and interrupts are disabled for clients that request blocking
> > transfers.
> >
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/mailbox/mailbox.c          | 8 ++++++++
> >  include/linux/mailbox_controller.h | 4 ++++
> >  2 files changed, 12 insertions(+)
> >
> > diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c
> > index 674b35f402f5..0eaf21259874 100644
> > --- a/drivers/mailbox/mailbox.c
> > +++ b/drivers/mailbox/mailbox.c
> > @@ -267,6 +267,14 @@ int mbox_send_message(struct mbox_chan *chan, void *mssg)
> >                 unsigned long wait;
> >                 int ret;
> >
> > +               if (irqs_disabled() && chan->mbox->ops->flush) {
> > +                       ret = chan->mbox->ops->flush(chan, chan->cl->tx_tout);
> > +                       if (ret < 0)
> > +                               tx_tick(chan, ret);
> > +
> > +                       return ret;
> > +               }
> > +
> This is hacky. I think we can do without busy waiting in atomic
> context. You could queue locally while in atomic context and then
> transfer in blocking mode. I don't think we should worry about the
> 'throughput' as there already is no h/w rate control even with
> busy-waiting.

I actually tried to do that before I added this flushing mechanism. The
problem is, like you said, one of rate control. As mentioned in the
cover letter, the shared mailboxes implemented in tegra-hsp are used as
RX and TX channels for the TCU, which is like a virtual UART. The TTY
driver included as part of this series will use one of the mailboxes to
transmit data that is written to the console. The problem is that if
these transmissions are not rate-limited on the TTY driver side, the
console will just keep writing data and eventually overflow the buffer
that we have in the mailbox subsystem.

The problem is that data comes in at a much higher rate than what we can
output. This is especially true at boot when the TCU console takes over
and the whole log buffer is dumped on it.

So the only way to rate-limit is to either make mbox_send_message()
block, but that can only be done in non-atomic context. The console,
however, will always run in atomic context, so the only way to do rate-
limiting is by busy looping.

Thierry

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  reply	other threads:[~2018-11-20 15:29 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-12 15:18 [PATCH v2 00/10] serial: Add Tegra Combined UART driver Thierry Reding
2018-11-12 15:18 ` [PATCH v2 01/10] mailbox: Support blocking transfers in atomic context Thierry Reding
2018-11-17 17:27   ` Jassi Brar
2018-11-20 15:29     ` Thierry Reding [this message]
2018-11-21 14:27       ` Thierry Reding
2018-11-22  2:18         ` Jassi Brar
2018-11-22  8:47           ` Thierry Reding
2018-11-22 16:07             ` Jassi Brar
2018-11-22 17:34               ` Thierry Reding
2018-11-23 11:17             ` Thierry Reding
2018-11-23 11:56               ` Thierry Reding
2018-11-28  9:43   ` Jon Hunter
2018-11-28 10:08     ` Thierry Reding
2018-11-29  5:23     ` Jassi Brar
2018-11-29 15:23       ` Thierry Reding
2018-12-07  5:56         ` Jassi Brar
2018-12-07  6:19           ` Mikko Perttunen
2018-12-08  5:51             ` Jassi Brar
2018-12-08  8:50               ` Greg KH
2018-12-09  1:20                 ` Jassi Brar
2018-12-07 11:32           ` Thierry Reding
2018-12-07 15:39             ` Greg KH
2018-12-08  6:09             ` Jassi Brar
2018-12-10  9:52               ` Thierry Reding
2018-12-10 20:30                 ` Jassi Brar
2018-12-10 20:45                   ` Thierry Reding
2018-12-10 21:32                     ` Jassi Brar
2018-11-12 15:18 ` [PATCH v2 02/10] mailbox: Allow multiple controllers per device Thierry Reding
2018-11-12 15:18 ` [PATCH v2 03/10] dt-bindings: tegra186-hsp: Add shared mailboxes Thierry Reding
2018-11-12 15:18 ` [PATCH v2 04/10] mailbox: tegra-hsp: Add support for " Thierry Reding
2018-11-13 11:09   ` Jon Hunter
2018-11-13 13:09     ` Thierry Reding
2018-11-13 19:24       ` Jon Hunter
2018-11-12 15:18 ` [PATCH v2 05/10] mailbox: tegra-hsp: Add suspend/resume support Thierry Reding
2018-11-13 11:17   ` Jon Hunter
2018-12-10  9:58     ` Thierry Reding
2018-11-12 15:18 ` [PATCH v2 06/10] dt-bindings: serial: Add bindings for nvidia, tegra194-tcu Thierry Reding
2018-11-13  9:39   ` [PATCH v2 06/10] dt-bindings: serial: Add bindings for nvidia,tegra194-tcu Jon Hunter
2018-11-13 10:03     ` Thierry Reding
2018-11-13 10:11       ` Jon Hunter
2018-11-12 15:18 ` [PATCH v2 07/10] serial: Add Tegra Combined UART driver Thierry Reding
2018-11-12 15:18 ` [PATCH v2 08/10] arm64: tegra: Add nodes for TCU on Tegra194 Thierry Reding
2018-11-12 15:18 ` [PATCH v2 09/10] arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888 Thierry Reding
2018-11-12 15:18 ` [PATCH v2 10/10] arm64: defconfig: Enable Tegra TCU Thierry Reding

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