From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [RFC PATCH v3 09/17] pinctrl: sunxi: add support for suniv F1C100s (newer F-series SoCs) Date: Thu, 22 Nov 2018 09:36:59 +0100 Message-ID: <20181122083659.qajcd4w3azcdpn5y@flea> References: Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hpm4q25bdgcwew2c" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Mesih Kilinc Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Chen-Yu Tsai , Russell King , Daniel Lezcano , Marc Zyngier , Linus Walleij , Icenowy Zheng , Rob Herring , Julian Calaby List-Id: devicetree@vger.kernel.org --hpm4q25bdgcwew2c Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Wed, Nov 21, 2018 at 09:30:42PM +0300, Mesih Kilinc wrote: > The suniv F1C100s chip (several new F-series SoCs) of Allwinner has a > pin > controller like other SoCs from Allwinner. > > Add support for it. > > Signed-off-by: Mesih Kilinc Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --hpm4q25bdgcwew2c--