From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jassi Brar <jassisinghbrar@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jslaby@suse.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
Jon Hunter <jonathanh@nvidia.com>, Timo Alho <talho@nvidia.com>,
Pekka Pessi <ppessi@nvidia.com>,
Mika Liljeberg <mliljeberg@nvidia.com>,
linux-tegra@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v3 03/12] dt-bindings: tegra186-hsp: Add shared mailboxes
Date: Wed, 28 Nov 2018 10:54:12 +0100 [thread overview]
Message-ID: <20181128095421.20573-4-thierry.reding@gmail.com> (raw)
In-Reply-To: <20181128095421.20573-1-thierry.reding@gmail.com>
From: Mikko Perttunen <mperttunen@nvidia.com>
Shared mailboxes are a mechanism to transport data from one processor in
the system to another. They are bidirectional links with both a producer
and a consumer. Interrupts are used to let the consumer know when data
was written to the mailbox by the producer, and to let the producer know
when the consumer has read the data from the mailbox. These interrupts
are mapped to one or more "shared interrupts". Typically each processor
in the system owns one of these shared interrupts.
Add documentation to the device tree bindings about how clients can use
mailbox specifiers to request a specific shared mailbox and select which
direction they drive. Also document how to specify the shared interrupts
in addition to the existing doorbell interrupt.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- describe in more detail how the mailbox specifiers are constructed
- encode mailbox direction in the device tree mailbox specifier
---
.../bindings/mailbox/nvidia,tegra186-hsp.txt | 30 +++++++++++++++----
include/dt-bindings/mailbox/tegra186-hsp.h | 11 +++++++
2 files changed, 36 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
index b99d25fc2f26..ff3eafc5a882 100644
--- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
+++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
@@ -15,12 +15,15 @@ Required properties:
Array of strings.
one of:
- "nvidia,tegra186-hsp"
+ - "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"
- reg : Offset and length of the register set for the device.
- interrupt-names
Array of strings.
Contains a list of names for the interrupts described by the interrupt
property. May contain the following entries, in any order:
- "doorbell"
+ - "sharedN", where 'N' is a number from zero up to the number of
+ external interrupts supported by the HSP instance minus one.
Users of this binding MUST look up entries in the interrupt property
by name, using this interrupt-names property to do so.
- interrupts
@@ -29,12 +32,29 @@ Required properties:
in a matching order.
- #mbox-cells : Should be 2.
-The mbox specifier of the "mboxes" property in the client node should
-contain two data. The first one should be the HSP type and the second
-one should be the ID that the client is going to use. Those information
-can be found in the following file.
+The mbox specifier of the "mboxes" property in the client node should contain
+two cells. The first cell determines the HSP type and the second cell is used
+to identify the mailbox that the client is going to use.
-- <dt-bindings/mailbox/tegra186-hsp.h>.
+For doorbells, the second cell specifies the index of the doorbell to use.
+
+For shared mailboxes, the second cell is composed of two fields:
+- bits 31..24:
+ A bit mask of flags that further specify how the shared mailbox will be
+ used. Valid flags are:
+ - bit 31:
+ Defines the direction of the mailbox. If set, the mailbox will be used
+ as a producer (i.e. used to send data). If cleared, the mailbox is the
+ consumer of data sent by a producer.
+
+- bits 23.. 0:
+ The index of the shared mailbox to use. The number of available mailboxes
+ may vary by instance of the HSP block and SoC generation.
+
+The following file contains definitions that can be used to construct mailbox
+specifiers:
+
+ <dt-bindings/mailbox/tegra186-hsp.h>
Example:
diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h
index bcab5b7ca785..3bdec7a84d35 100644
--- a/include/dt-bindings/mailbox/tegra186-hsp.h
+++ b/include/dt-bindings/mailbox/tegra186-hsp.h
@@ -22,4 +22,15 @@
#define TEGRA_HSP_DB_MASTER_CCPLEX 17
#define TEGRA_HSP_DB_MASTER_BPMP 19
+/*
+ * Shared mailboxes are unidirectional, so the direction needs to be specified
+ * in the device tree.
+ */
+#define TEGRA_HSP_SM_MASK 0x00ffffff
+#define TEGRA_HSP_SM_FLAG_RX (0 << 31)
+#define TEGRA_HSP_SM_FLAG_TX (1 << 31)
+
+#define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK))
+#define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK))
+
#endif
--
2.19.1
next prev parent reply other threads:[~2018-11-28 20:55 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-28 9:54 [PATCH v3 00/12] serial: Add Tegra Combined UART driver Thierry Reding
2018-11-28 9:54 ` [PATCH v3 01/12] mailbox: Support blocking transfers in atomic context Thierry Reding
2018-11-28 9:54 ` [PATCH v3 02/12] mailbox: Allow multiple controllers per device Thierry Reding
2018-11-28 9:54 ` Thierry Reding [this message]
2018-11-28 9:54 ` [PATCH v3 04/12] mailbox: tegra-hsp: Add support for shared mailboxes Thierry Reding
2018-11-28 9:54 ` [PATCH v3 05/12] mailbox: tegra-hsp: Add suspend/resume support Thierry Reding
2018-11-28 9:54 ` [PATCH v3 06/12] mailbox: tegra-hsp: use devm_kstrdup_const() Thierry Reding
2018-11-28 9:54 ` [PATCH v3 07/12] mailbox: tegra-hsp: Use device-managed registration API Thierry Reding
2018-11-28 9:54 ` [PATCH v3 08/12] dt-bindings: serial: Add bindings for nvidia,tegra194-tcu Thierry Reding
2018-11-28 9:54 ` [PATCH v3 09/12] serial: Add Tegra Combined UART driver Thierry Reding
2018-11-28 9:54 ` [PATCH v3 10/12] arm64: tegra: Add nodes for TCU on Tegra194 Thierry Reding
2018-11-28 9:54 ` [PATCH v3 11/12] arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888 Thierry Reding
2018-11-28 9:54 ` [PATCH v3 12/12] arm64: defconfig: Enable Tegra TCU Thierry Reding
2018-12-05 16:15 ` [PATCH v3 00/12] serial: Add Tegra Combined UART driver Thierry Reding
2018-12-22 5:13 ` Jassi Brar
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