From mboxrd@z Thu Jan 1 00:00:00 1970 From: Douglas Anderson Subject: [PATCH 2/2] arm64: dts: sdm845: Add gpu clock controller node Date: Wed, 28 Nov 2018 10:57:43 -0800 Message-ID: <20181128185743.75328-2-dianders@chromium.org> References: <20181128185743.75328-1-dianders@chromium.org> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20181128185743.75328-1-dianders@chromium.org> Sender: linux-kernel-owner@vger.kernel.org To: Stephen Boyd , Andy Gross Cc: linux-arm-msm@vger.kernel.org, Taniya Das , "Kristian H . Kristensen" , Jordan Crouse , Amit Nischal , Douglas Anderson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , David Brown , Mark Rutland , linux-soc@vger.kernel.org List-Id: devicetree@vger.kernel.org Add the GPU clock controller nodes as per the example. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1419b0098cb3..300688e92439 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -1078,6 +1079,16 @@ }; }; + gpucc: clock-controller@5090000 { + compatible = "qcom,sdm845-gpucc"; + reg = <0x5090000 0x9000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + usb_1_hsphy: phy@88e2000 { compatible = "qcom,sdm845-qusb2-phy"; reg = <0x88e2000 0x400>; -- 2.20.0.rc0.387.gc7a69e6b6c-goog