From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: [PATCH v2 3/8] phy: enumerate SATA PHY mode Date: Fri, 30 Nov 2018 15:47:38 +0100 Message-ID: <20181130144743.675-4-miquel.raynal@bootlin.com> References: <20181130144743.675-1-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20181130144743.675-1-miquel.raynal@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Kishon Vijay Abraham I Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Thomas Petazzoni , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Marcin Wojtas , Grzegorz Jaszczyk , Miquel Raynal List-Id: devicetree@vger.kernel.org From: Grzegorz Jaszczyk Add SATA mode to the PHY framework in preparation of upcoming PHYs that will handle it. For instance, SATA mode will be used by the Armada3700 COMPHY driver, which supports configuring SERDES lanes to be used by various controllers: Ethernet, USB3, SATA and PCIe. Signed-off-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal --- include/linux/phy/phy.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 03b319f89a34..553d8520e37f 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -42,6 +42,7 @@ enum phy_mode { PHY_MODE_UFS_HS_A, PHY_MODE_UFS_HS_B, PHY_MODE_PCIE, + PHY_MODE_SATA, }; /** -- 2.19.1