[PATCH v3 1/4] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment

[PATCH v3 1/4] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment

[Jonathan Marek]

This allows controlling which of the 8 lanes are used for 6 bit color.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
v3: removed empty line and added documentation

 .../devicetree/bindings/display/msm/mdp4.txt  |  2 ++
 .../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 21 ++++++++++++-------
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.txt b/Documentation/devicetree/bindings/display/msm/mdp4.txt
index 3c341a15c..b07eeb38f 100644
--- a/Documentation/devicetree/bindings/display/msm/mdp4.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp4.txt
@@ -38,6 +38,8 @@ Required properties:
 Optional properties:
 - clock-names: the following clocks are optional:
   * "lut_clk"
+- qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be
+  used for LCDC. This is only valid for 18bpp panels.
 
 Example:
 
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
index 9e08c2efa..c9e34501a 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
@@ -377,20 +377,25 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder)
 	unsigned long pc = mdp4_lcdc_encoder->pixclock;
 	struct mdp4_kms *mdp4_kms = get_kms(encoder);
 	struct drm_panel *panel;
+	uint32_t config;
 	int i, ret;
 
 	if (WARN_ON(mdp4_lcdc_encoder->enabled))
 		return;
 
 	/* TODO: hard-coded for 18bpp: */
-	mdp4_crtc_set_config(encoder->crtc,
-			MDP4_DMA_CONFIG_R_BPC(BPC6) |
-			MDP4_DMA_CONFIG_G_BPC(BPC6) |
-			MDP4_DMA_CONFIG_B_BPC(BPC6) |
-			MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
-			MDP4_DMA_CONFIG_PACK(0x21) |
-			MDP4_DMA_CONFIG_DEFLKR_EN |
-			MDP4_DMA_CONFIG_DITHER_EN);
+	config =
+		MDP4_DMA_CONFIG_R_BPC(BPC6) |
+		MDP4_DMA_CONFIG_G_BPC(BPC6) |
+		MDP4_DMA_CONFIG_B_BPC(BPC6) |
+		MDP4_DMA_CONFIG_PACK(0x21) |
+		MDP4_DMA_CONFIG_DEFLKR_EN |
+		MDP4_DMA_CONFIG_DITHER_EN;
+
+	if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb"))
+		config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;
+
+	mdp4_crtc_set_config(encoder->crtc, config);
 	mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
 
 	bs_set(mdp4_lcdc_encoder, 1);
-- 
2.17.1

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[PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Jonathan Marek]

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
 arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
 2 files changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 67d462715..e9a7bbce9 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -628,5 +628,22 @@
 				clock-names = "ipg", "ahb";
 			};
 		};
+
+		gpu: gpu@30000000 {
+			compatible = "amd,imageon-200.1", "amd,imageon";
+			reg = <0x30000000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <12>;
+			interrupt-names = "kgsl_3d0_irq";
+			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
+			clock-names = "core_clk", "mem_iface_clk";
+
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel@0 {
+					qcom,gpu-freq = <166250000>;
+				};
+			};
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 207eb557c..586d45586 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -838,5 +838,22 @@
 			reg = <0xf8000000 0x20000>;
 			clocks = <&clks IMX5_CLK_OCRAM>;
 		};
+
+		gpu: gpu@30000000 {
+			compatible = "amd,imageon-200.0", "amd,imageon";
+			reg = <0x30000000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <12>;
+			interrupt-names = "kgsl_3d0_irq";
+			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
+			clock-names = "core_clk", "mem_iface_clk";
+
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel@0 {
+					qcom,gpu-freq = <200000000>;
+				};
+			};
+		};
 	};
 };
-- 
2.17.1

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Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Jordan Crouse]

On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
>  arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
>  2 files changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
> index 67d462715..e9a7bbce9 100644
> --- a/arch/arm/boot/dts/imx51.dtsi
> +++ b/arch/arm/boot/dts/imx51.dtsi
> @@ -628,5 +628,22 @@
>  				clock-names = "ipg", "ahb";
>  			};
>  		};
> +
> +		gpu: gpu@30000000 {
> +			compatible = "amd,imageon-200.1", "amd,imageon";
> +			reg = <0x30000000 0x20000>;
> +			reg-names = "kgsl_3d0_reg_memory";
> +			interrupts = <12>;
> +			interrupt-names = "kgsl_3d0_irq";
> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
> +			clock-names = "core_clk", "mem_iface_clk";
> +
> +			qcom,gpu-pwrlevels {
> +				compatible = "qcom,gpu-pwrlevels";
> +				qcom,gpu-pwrlevel@0 {
> +					qcom,gpu-freq = <166250000>;
> +				};
> +			};

There shouldn't be any incremental cost in the source code to use OPP; it should
just work. And then this won't give us a further reason to keep the legacy
code around when we decide to dump any pretense of downstream "compatibility".

> +		};
>  	};
>  };
> diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
> index 207eb557c..586d45586 100644
> --- a/arch/arm/boot/dts/imx53.dtsi
> +++ b/arch/arm/boot/dts/imx53.dtsi
> @@ -838,5 +838,22 @@
>  			reg = <0xf8000000 0x20000>;
>  			clocks = <&clks IMX5_CLK_OCRAM>;
>  		};
> +
> +		gpu: gpu@30000000 {
> +			compatible = "amd,imageon-200.0", "amd,imageon";
> +			reg = <0x30000000 0x20000>;
> +			reg-names = "kgsl_3d0_reg_memory";
> +			interrupts = <12>;
> +			interrupt-names = "kgsl_3d0_irq";
> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
> +			clock-names = "core_clk", "mem_iface_clk";
> +
> +			qcom,gpu-pwrlevels {
> +				compatible = "qcom,gpu-pwrlevels";
> +				qcom,gpu-pwrlevel@0 {
> +					qcom,gpu-freq = <200000000>;
> +				};

Same.

> +			};

> +		};
>  	};
>  };
> -- 
> 2.17.1

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Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Fabio Estevam]

Hi Jonathan,

Thanks for working on this. Really nice to see GPU support for mx51/mx53!

On Mon, Dec 3, 2018 at 7:21 PM Jonathan Marek <jonathan@marek.ca> wrote:

Please add a commit log.

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>

> ---
>  arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
>  arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
>  2 files changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
> index 67d462715..e9a7bbce9 100644
> --- a/arch/arm/boot/dts/imx51.dtsi
> +++ b/arch/arm/boot/dts/imx51.dtsi
> @@ -628,5 +628,22 @@
>                                 clock-names = "ipg", "ahb";
>                         };
>                 };
> +
> +               gpu: gpu@30000000 {

We put the peripheral nodes in address order, so this one should go
prior to the IPU node.

> +                       compatible = "amd,imageon-200.1", "amd,imageon";

I can't find the dt-bindings for these compatible entries. Have you
documented them?

> +                       reg = <0x30000000 0x20000>;
> +                       reg-names = "kgsl_3d0_reg_memory";
> +                       interrupts = <12>;
> +                       interrupt-names = "kgsl_3d0_irq";
> +                       clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
> +                       clock-names = "core_clk", "mem_iface_clk";
> +
> +                       qcom,gpu-pwrlevels {
> +                               compatible = "qcom,gpu-pwrlevels";
> +                               qcom,gpu-pwrlevel@0 {

You could drop this @0

Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Jonathan marek]

On 12/03/2018 05:16 PM, Fabio Estevam wrote:
> Hi Jonathan,
> 
> Thanks for working on this. Really nice to see GPU support for mx51/mx53!
> 
> On Mon, Dec 3, 2018 at 7:21 PM Jonathan Marek <jonathan@marek.ca> wrote:
> 
> Please add a commit log.
> 
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> 
>> ---
>>   arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
>>   arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
>>   2 files changed, 34 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
>> index 67d462715..e9a7bbce9 100644
>> --- a/arch/arm/boot/dts/imx51.dtsi
>> +++ b/arch/arm/boot/dts/imx51.dtsi
>> @@ -628,5 +628,22 @@
>>                                  clock-names = "ipg", "ahb";
>>                          };
>>                  };
>> +
>> +               gpu: gpu@30000000 {
> 
> We put the peripheral nodes in address order, so this one should go
> prior to the IPU node.
> 
>> +                       compatible = "amd,imageon-200.1", "amd,imageon";
> 
> I can't find the dt-bindings for these compatible entries. Have you
> documented them?
> 

It is the same as qcom,adreno which is documented here:

Documentation/devicetree/bindings/display/msm/gpu.txt

I guess I should add amd,imageon there.

>> +                       reg = <0x30000000 0x20000>;
>> +                       reg-names = "kgsl_3d0_reg_memory";
>> +                       interrupts = <12>;
>> +                       interrupt-names = "kgsl_3d0_irq";
>> +                       clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
>> +                       clock-names = "core_clk", "mem_iface_clk";
>> +
>> +                       qcom,gpu-pwrlevels {
>> +                               compatible = "qcom,gpu-pwrlevels";
>> +                               qcom,gpu-pwrlevel@0 {
> 
> You could drop this @0
> 
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Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Jonathan marek]

On 12/03/2018 05:10 PM, Jordan Crouse wrote:
> On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>   arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
>>   arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
>>   2 files changed, 34 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
>> index 67d462715..e9a7bbce9 100644
>> --- a/arch/arm/boot/dts/imx51.dtsi
>> +++ b/arch/arm/boot/dts/imx51.dtsi
>> @@ -628,5 +628,22 @@
>>   				clock-names = "ipg", "ahb";
>>   			};
>>   		};
>> +
>> +		gpu: gpu@30000000 {
>> +			compatible = "amd,imageon-200.1", "amd,imageon";
>> +			reg = <0x30000000 0x20000>;
>> +			reg-names = "kgsl_3d0_reg_memory";
>> +			interrupts = <12>;
>> +			interrupt-names = "kgsl_3d0_irq";
>> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
>> +			clock-names = "core_clk", "mem_iface_clk";
>> +
>> +			qcom,gpu-pwrlevels {
>> +				compatible = "qcom,gpu-pwrlevels";
>> +				qcom,gpu-pwrlevel@0 {
>> +					qcom,gpu-freq = <166250000>;
>> +				};
>> +			};
> 
> There shouldn't be any incremental cost in the source code to use OPP; it should
> just work. And then this won't give us a further reason to keep the legacy
> code around when we decide to dump any pretense of downstream "compatibility".
> 

I will switch to OPP.

>> +		};
>>   	};
>>   };
>> diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
>> index 207eb557c..586d45586 100644
>> --- a/arch/arm/boot/dts/imx53.dtsi
>> +++ b/arch/arm/boot/dts/imx53.dtsi
>> @@ -838,5 +838,22 @@
>>   			reg = <0xf8000000 0x20000>;
>>   			clocks = <&clks IMX5_CLK_OCRAM>;
>>   		};
>> +
>> +		gpu: gpu@30000000 {
>> +			compatible = "amd,imageon-200.0", "amd,imageon";
>> +			reg = <0x30000000 0x20000>;
>> +			reg-names = "kgsl_3d0_reg_memory";
>> +			interrupts = <12>;
>> +			interrupt-names = "kgsl_3d0_irq";
>> +			clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
>> +			clock-names = "core_clk", "mem_iface_clk";
>> +
>> +			qcom,gpu-pwrlevels {
>> +				compatible = "qcom,gpu-pwrlevels";
>> +				qcom,gpu-pwrlevel@0 {
>> +					qcom,gpu-freq = <200000000>;
>> +				};
> 
> Same.
> 
>> +			};
> 
>> +		};
>>   	};
>>   };
>> -- 
>> 2.17.1
> 
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Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes

[Fabio Estevam]

On Mon, Dec 3, 2018 at 8:24 PM Jonathan marek <jonathan@marek.ca> wrote:

> > I can't find the dt-bindings for these compatible entries. Have you
> > documented them?
> >
>
> It is the same as qcom,adreno which is documented here:
>
> Documentation/devicetree/bindings/display/msm/gpu.txt
>
> I guess I should add amd,imageon there.

Yes, please.