From: Jonathan Marek <jonathan-eSc4qw6YbEQ@public.gmane.org>
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
open list <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Chris.Healy-c8ZVq/bFV1I@public.gmane.org,
festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH v4 5/5] dt-bindings: display: msm/gpu: document amd, imageon compatible
Date: Tue, 4 Dec 2018 10:17:01 -0500 [thread overview]
Message-ID: <20181204151702.8514-5-jonathan@marek.ca> (raw)
In-Reply-To: <20181204151702.8514-1-jonathan-eSc4qw6YbEQ@public.gmane.org>
Document the new amd,imageon compatible, used for non-qcom hardware that
uses the drm/msm driver (iMX5).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
Documentation/devicetree/bindings/display/msm/gpu.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 43fac0fe0..ac8df3b87 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -1,11 +1,13 @@
Qualcomm adreno/snapdragon GPU
Required properties:
-- compatible: "qcom,adreno-XYZ.W", "qcom,adreno"
+- compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or
+ "amd,imageon-XYZ.W", "amd,imageon"
for example: "qcom,adreno-306.0", "qcom,adreno"
Note that you need to list the less specific "qcom,adreno" (since this
is what the device is matched on), in addition to the more specific
with the chip-id.
+ If "amd,imageon" is used, there should be no top level msm device.
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt signal from the gpu.
- clocks: device clocks
--
2.17.1
_______________________________________________
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
next prev parent reply other threads:[~2018-12-04 15:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 15:16 [PATCH v4 1/5] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment Jonathan Marek
[not found] ` <20181204151702.8514-1-jonathan-eSc4qw6YbEQ@public.gmane.org>
2018-12-04 15:17 ` [PATCH v4 4/5] ARM: dts: imx5: add gpu nodes Jonathan Marek
[not found] ` <20181204151702.8514-4-jonathan-eSc4qw6YbEQ@public.gmane.org>
2018-12-07 23:25 ` Fabio Estevam
2018-12-08 3:24 ` Shawn Guo
2018-12-04 15:17 ` Jonathan Marek [this message]
2018-12-07 23:18 ` [PATCH v4 5/5] dt-bindings: display: msm/gpu: document amd,imageon compatible Rob Herring
2018-12-07 23:18 ` [PATCH v4 1/5] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment Rob Herring
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