* [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet
@ 2018-11-13 13:05 Heiko Stuebner
2018-11-13 13:05 ` [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree Heiko Stuebner
[not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
0 siblings, 2 replies; 10+ messages in thread
From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw)
To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add a devicetree for the BQ Edison2 tablet from MundoReader.
Incidentially this is the device I wanted to run mainline Linux
on when starting the Rockchip port - thinking, "this can't take
thaaat long" ;-) - so I've come somewhat full-circle now.
With Lima it can also use gpu acceleration for gles2.
Notable absent peripherals are the touchscreen (ft5606),
IT66121 hdmi bridge (internal panel is working nicely) and sound.
All areas I'm still trying to get working.
The series includes some smallish cleanups before the board
with cleaning up the cpu-core nodes being a big part.
And there are a number of driver-side additions pending that
should get accepted before the board itself can go in.
(bq24196, Innolux panel, tmp108-interrupt).
Heiko Stuebner (6):
ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s
ARM: dts: rockchip: convert rk3188 to opp-v2
ARM: dts: rockchip: add cpu-core resets for rk3188
ARM: dts: rockchip: add phandles to secondary cpu cores
ARM: dts: rockchip: update cpu supplies on rk3188
ARM: dts: rockchip: add BQ Edison 2 QC devicetree
.../devicetree/bindings/arm/rockchip.txt | 4 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/rk3066a.dtsi | 3 +
arch/arm/boot/dts/rk3188-bqedison2qc.dts | 711 ++++++++++++++++++
arch/arm/boot/dts/rk3188-px3-evb.dts | 14 +-
arch/arm/boot/dts/rk3188-radxarock.dts | 14 +-
arch/arm/boot/dts/rk3188.dtsi | 66 +-
7 files changed, 797 insertions(+), 16 deletions(-)
create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts
--
2.18.0
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree 2018-11-13 13:05 [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner @ 2018-11-13 13:05 ` Heiko Stuebner [not found] ` <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> 2018-12-06 13:20 ` Heiko Stuebner [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> 1 sibling, 2 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip Cc: mark.rutland, devicetree, heiko, robh+dt, linux-arm-kernel, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner@bq.com> The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader using a rk3188 soc. Add a devicetree for it. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com> --- .../devicetree/bindings/arm/rockchip.txt | 4 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rk3188-bqedison2qc.dts | 711 ++++++++++++++++++ 3 files changed, 716 insertions(+) create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 7ce7382fedd8..6445dbc25c29 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -33,6 +33,10 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "mundoreader,bq-curie2", "rockchip,rk3066a"; +- bq Edison 2 Quad-Core tablet: + Required root node properties: + - compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188"; + - ChipSPARK Rayeager PX2 board: Required root node properties: - compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b0e966d625b9..71d6c015f246 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -854,6 +854,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3066a-marsboard.dtb \ rk3066a-mk808.dtb \ rk3066a-rayeager.dtb \ + rk3188-bqedison2qc.dtb \ rk3188-px3-evb.dtb \ rk3188-radxarock.dtb \ rk3228-evb.dtb \ diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts new file mode 100644 index 000000000000..a7477a09fbe8 --- /dev/null +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -0,0 +1,711 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 MundoReader S.L. + * Author: Heiko Stuebner <heiko.stuebner@bq.com> + */ + +/dts-v1/; +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/input/input.h> +#include "rk3188.dtsi" + +/ { + model = "BQ Edison2 Quad-Core"; + compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188"; + + memory@60000000 { + device_type = "memory"; + reg = <0x60000000 0x80000000>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vsys>; + pwms = <&pwm1 0 25000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key &usb_int>; + + power { + gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + label = "GPIO Key Power"; + linux,input-type = <1>; + debounce-interval = <100>; + wakeup-source; + }; + + wake_on_usb: wake-on-usb { + label = "Wake-on-USB"; + gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WAKEUP>; + wakeup-source; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_hold>; + /* only drive the pin low until device is off */ + active-delay-ms = <3000>; + }; + + lvds-encoder { + compatible = "ti,sn75lvds83", "lvds-encoder"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_in_vop0: endpoint { + remote-endpoint = <&vop0_out_lvds>; + }; + }; + + port@1 { + reg = <1>; + lvds_out_panel: endpoint { + remote-endpoint = <&panel_in_lvds>; + }; + }; + }; + + panel { + compatible = "innolux,ee101ia-01d", "panel-lvds"; + backlight = <&backlight>; + + /* pin LCD_CS, Nshtdn input of lvds-encoder */ + enable-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_cs>; + power-supply = <&vcc_lcd>; + + data-mapping = "vesa-24"; + height-mm = <163>; + width-mm = <261>; + + panel-timing { + clock-frequency = <72000000>; + hactive = <1280>; + vactive = <800>; + hback-porch = <160>; + hfront-porch = <16>; + hsync-len = <10>; + vback-porch = <23>; + vfront-porch = <12>; + vsync-len = <3>; + }; + + port { + panel_in_lvds: endpoint { + remote-endpoint = <&lvds_out_panel>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&hym8563>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_reg_on>; + reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>; + }; + + avdd_cif: cif-avdd-regulator { + compatible = "regulator-fixed"; + regulator-name = "avdd-cif"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cif_avdd_en>; + startup-delay-us = <100000>; + vin-supply = <&vcc28_cif>; + }; + + vcc_5v: vcc-5v-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&v5_drv>; + vin-supply = <&vsys>; + }; + + vcc_lcd: lcd-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-lcd"; + gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_en>; + startup-delay-us = <50000>; + vin-supply = <&vcc_io>; + }; + + vcc_otg: usb-otg-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_drv>; + startup-delay-us = <100000>; + vin-supply = <&vcc_5v>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; + + vccq_emmc: emmc-vccq-regulator { + compatible = "regulator-fixed"; + regulator-name = "vccq-emmc"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc_io>; + }; + + /* supplied from the bq24196 */ + vsys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vsys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&cru { + assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>, + <&cru ACLK_CPU>, + <&cru HCLK_CPU>, <&cru PCLK_CPU>, + <&cru ACLK_PERI>, <&cru HCLK_PERI>, + <&cru PCLK_PERI>; + assigned-clock-rates = <594000000>, <504000000>, + <300000000>, + <150000000>, <75000000>, + <300000000>, <150000000>, + <75000000>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vccq_emmc>; + status = "okay"; +}; + +&gpu { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + lis3de: accelerometer@29 { + compatible = "st,lis3de"; + reg = <0x29>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB7 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&gsensor_int>; + rotation-matrix = "1", "0", "0", + "0", "-1", "0", + "0", "0", "1"; + vdd-supply = <&vcc_io>; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + tmp108@48 { + compatible = "ti,tmp108"; + reg = <0x48>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&tmp_alrt>; + #thermal-sensor-cells = <0>; + }; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + #clock-cells = <0>; + clock-output-names = "xin32k"; + }; + + bat: battery@55 { + compatible = "ti,bq27541"; + reg = <0x55>; + power-supplies = <&bq24196>; + }; + + act8846: pmic@5a { + compatible = "active-semi,act8846"; + reg = <0x5a>; + pinctrl-names = "default"; + pinctrl-0 = <&dvs0_ctl &pmic_int>; + + vp1-supply = <&vsys>; + vp2-supply = <&vsys>; + vp3-supply = <&vsys>; + vp4-supply = <&vsys>; + inl1-supply = <&vcc_io>; + inl2-supply = <&vsys>; + inl3-supply = <&vsys>; + + regulators { + vcc_ddr: REG1 { + regulator-name = "VCC_DDR"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd_log: REG2 { + regulator-name = "VDD_LOG"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd_arm: REG3 { + regulator-name = "VDD_ARM"; + regulator-min-microvolt = <875000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + vcc_io: vcc_hdmi: REG4 { + regulator-name = "VCC_IO"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vdd_10: REG5 { + regulator-name = "VDD_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + vdd_12: REG6 { + regulator-name = "VDD_12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vcc18_cif: REG7 { + regulator-name = "VCC18_CIF"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcca_33: REG8 { + regulator-name = "VCCA_33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vcc_tp: REG9 { + regulator-name = "VCC_TP"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccio_wl: REG10 { + regulator-name = "VCCIO_WL"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + vcc_18: REG11 { + regulator-name = "VCC_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc28_cif: REG12 { + regulator-name = "VCC28_CIF"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + }; + }; + + bq24196: charger@6b { + compatible = "ti,bq24196"; + reg = <0x6b>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PD7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&charger_int &chg_ctl &otg_en>; + ti,system-minimum-microvolt = <3200000>; + monitored-battery = <&bat>; + omit-battery-class; + + usb_otg_vbus: usb-otg-vbus { }; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <400000>; + status = "okay"; + + rt5616: codec@1b { + compatible = "realtek,rt5616"; + reg = <0x1b>; + clocks = <&cru SCLK_I2S0>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; +}; + +&i2s0 { + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>; + vmmcq-supply = <&vccio_wl>; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&gpio3>; + interrupts = <RK_PD2 GPIO_ACTIVE_HIGH>; + interrupt-names = "host-wake"; + brcm,drive-strength = <5>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake>; + }; +}; + +&pwm1 { + status = "okay"; +}; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + pcfg_output_low: pcfg-output-low { + output-low; + }; + + act8846 { + dvs0_ctl: dvs0-ctl { + rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>; + }; + + pmic_int: pmic-int { + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + bq24196 { + charger_int: charger-int { + rockchip,pins = <0 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + /* pin hog to make it select usb profile */ + chg_ctl: chg-ctl { + rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>; + }; + + /* low: charging, high: complete, fault: blinking */ + chg_det: chg-det { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + /* charging enabled when pin low and register set */ + chg_en: chg-en { + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>; + }; + + /* bq29196 powergood (when low) signal */ + dc_det: dc-det { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + /* wire bq24196 otg pin to high, to enable 500mA charging */ + otg_en: otg-en { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + camera { + cif0_pdn: cif0-pdn { + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + cif1_pdn: cif1-pdn { + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + cif_avdd_en: cif-avdd-en { + rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + display { + lcd_cs: lcd-cs { + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lcd_en: lcd-en { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ft5606 { + tp_int: tp-int { + rockchip,pins = <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + tp_rst: tp-rst { + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + hdmi_int: hdmi-int { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdmi_rst: hdmi-rst { + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + rtc_int: rtc-int { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + keys { + pwr_hold: pwr-hold { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + pwr_key: pwr-key { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + lis3de { + gsensor_int: gsensor-int { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + mmc { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + tmp108 { + tmp_alrt: tmp-alrt { + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + v5_drv: v5-drv { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otg_drv: otg-drv { + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_int: usb-int { + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rk903 { + bt_host_wake: bt-host-wake { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_reg_on: bt-reg-on { + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + /* pin hog to pull the reset high */ + bt_rst: bt-rst { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_output_high>; + }; + + bt_wake: bt-wake { + rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_host_wake: wifi-host-wake { + rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + wifi_reg_on: wifi-reg-on { + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + vref-supply = <&vcc_18>; + status = "okay"; +}; + +&spdif { + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <2000000>; + device-wakeup-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake &bt_reg_on &bt_rst &bt_wake>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&usb_host { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&vop0 { + status = "okay"; +}; + +&vop0_out { + vop0_out_lvds: endpoint { + remote-endpoint = <&lvds_in_vop0>; + }; +}; + +&vop1 { + pinctrl-names = "default"; + pinctrl-0 = <&lcdc1_dclk &lcdc1_den &lcdc1_hsync + &lcdc1_vsync &lcdc1_rgb24>; + status = "okay"; +}; + +&wdt { + status = "okay"; +}; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>]
* Re: [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree [not found] ` <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> @ 2018-12-04 20:21 ` Rob Herring 0 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2018-12-04 20:21 UTC (permalink / raw) Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner On Tue, 13 Nov 2018 14:05:59 +0100, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> > > The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader > using a rk3188 soc. Add a devicetree for it. > > Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> > --- > .../devicetree/bindings/arm/rockchip.txt | 4 + > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/rk3188-bqedison2qc.dts | 711 ++++++++++++++++++ > 3 files changed, 716 insertions(+) > create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts > Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree 2018-11-13 13:05 ` [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree Heiko Stuebner [not found] ` <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> @ 2018-12-06 13:20 ` Heiko Stuebner 1 sibling, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-12-06 13:20 UTC (permalink / raw) To: linux-rockchip; +Cc: mark.rutland, devicetree, robh+dt, linux-arm-kernel Am Dienstag, 13. November 2018, 14:05:59 CET schrieb Heiko Stuebner: > From: Heiko Stuebner <heiko.stuebner@bq.com> > > The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader > using a rk3188 soc. Add a devicetree for it. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com> applied for 4.21 ^ permalink raw reply [flat|nested] 10+ messages in thread
[parent not found: <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>]
* [PATCH 1/6] ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> @ 2018-11-13 13:05 ` Heiko Stuebner 2018-11-13 13:05 ` [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2 Heiko Stuebner ` (4 subsequent siblings) 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> The Rockchip i2s always just requires a sound-dail-cells value of 0, so add them to the core soc dtsi for convenience. Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> --- arch/arm/boot/dts/rk3066a.dtsi | 3 +++ arch/arm/boot/dts/rk3188.dtsi | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 57f75a7a529b..971cd10592e2 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -153,6 +153,7 @@ clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; rockchip,playback-channels = <8>; rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -170,6 +171,7 @@ clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>; rockchip,playback-channels = <2>; rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -187,6 +189,7 @@ clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>; rockchip,playback-channels = <2>; rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 7e0dc52630d9..fd896b0a46e3 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -139,6 +139,7 @@ clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; rockchip,playback-channels = <2>; rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; status = "disabled"; }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2 [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> 2018-11-13 13:05 ` [PATCH 1/6] ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s Heiko Stuebner @ 2018-11-13 13:05 ` Heiko Stuebner 2018-11-13 13:05 ` [PATCH 3/6] ARM: dts: rockchip: add cpu-core resets for rk3188 Heiko Stuebner ` (3 subsequent siblings) 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> The fact that OPPs specified only on cpu0 work is Linux specific and normally cpu frequencies should be specified for each cpu core. To facilitate this without needing to duplicate the frequency table each time, convert to opp-v2 before adding references to all cores. Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> --- arch/arm/boot/dts/rk3188.dtsi | 55 ++++++++++++++++++++++++++++------- 1 file changed, 44 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index fd896b0a46e3..9d8c4c560e51 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -23,37 +23,70 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x0>; - operating-points = < - /* kHz uV */ - 1608000 1350000 - 1416000 1250000 - 1200000 1150000 - 1008000 1075000 - 816000 975000 - 600000 950000 - 504000 925000 - 312000 875000 - >; clock-latency = <40000>; clocks = <&cru ARMCLK>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x1>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x2>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x3>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-312000000 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <875000>; + clock-latency-ns = <40000>; + }; + opp-504000000 { + opp-hz = /bits/ 64 <504000000>; + opp-microvolt = <925000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <950000>; + opp-suspend; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <975000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1075000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1150000>; + }; + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1250000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <1350000>; }; }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/6] ARM: dts: rockchip: add cpu-core resets for rk3188 [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> 2018-11-13 13:05 ` [PATCH 1/6] ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s Heiko Stuebner 2018-11-13 13:05 ` [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2 Heiko Stuebner @ 2018-11-13 13:05 ` Heiko Stuebner 2018-11-13 13:05 ` [PATCH 4/6] ARM: dts: rockchip: add phandles to secondary cpu cores Heiko Stuebner ` (2 subsequent siblings) 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> Specify the reset handles for each cpu core. Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> --- arch/arm/boot/dts/rk3188.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 9d8c4c560e51..f1f7a36b46d4 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -26,6 +26,7 @@ clock-latency = <40000>; clocks = <&cru ARMCLK>; operating-points-v2 = <&cpu0_opp_table>; + resets = <&cru SRST_CORE0>; }; cpu@1 { device_type = "cpu"; @@ -33,6 +34,7 @@ next-level-cache = <&L2>; reg = <0x1>; operating-points-v2 = <&cpu0_opp_table>; + resets = <&cru SRST_CORE1>; }; cpu@2 { device_type = "cpu"; @@ -40,6 +42,7 @@ next-level-cache = <&L2>; reg = <0x2>; operating-points-v2 = <&cpu0_opp_table>; + resets = <&cru SRST_CORE2>; }; cpu@3 { device_type = "cpu"; @@ -47,6 +50,7 @@ next-level-cache = <&L2>; reg = <0x3>; operating-points-v2 = <&cpu0_opp_table>; + resets = <&cru SRST_CORE3>; }; }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/6] ARM: dts: rockchip: add phandles to secondary cpu cores [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ` (2 preceding siblings ...) 2018-11-13 13:05 ` [PATCH 3/6] ARM: dts: rockchip: add cpu-core resets for rk3188 Heiko Stuebner @ 2018-11-13 13:05 ` Heiko Stuebner 2018-11-13 13:05 ` [PATCH 5/6] ARM: dts: rockchip: update cpu supplies on rk3188 Heiko Stuebner 2018-11-27 14:14 ` [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> Add phandles to secondary cpu cores as we may need to reference these down the road as well. Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> --- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index f1f7a36b46d4..4acb501dd3f8 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -28,7 +28,7 @@ operating-points-v2 = <&cpu0_opp_table>; resets = <&cru SRST_CORE0>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; @@ -36,7 +36,7 @@ operating-points-v2 = <&cpu0_opp_table>; resets = <&cru SRST_CORE1>; }; - cpu@2 { + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; @@ -44,7 +44,7 @@ operating-points-v2 = <&cpu0_opp_table>; resets = <&cru SRST_CORE2>; }; - cpu@3 { + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/6] ARM: dts: rockchip: update cpu supplies on rk3188 [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ` (3 preceding siblings ...) 2018-11-13 13:05 ` [PATCH 4/6] ARM: dts: rockchip: add phandles to secondary cpu cores Heiko Stuebner @ 2018-11-13 13:05 ` Heiko Stuebner 2018-11-27 14:14 ` [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-13 13:05 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA, heiko-4mtYJXux2i+zQB+pC5nmwQ, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner From: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> cpu0-supply in cpu0 is deprecated, instead each cpu-core is supposed to list its supply separately. With the added cpu core phandles, update existing rk3188 boards accordingly. Signed-off-by: Heiko Stuebner <heiko.stuebner-K3U4GQvHnyU@public.gmane.org> --- arch/arm/boot/dts/rk3188-px3-evb.dts | 14 +++++++++++++- arch/arm/boot/dts/rk3188-radxarock.dts | 14 +++++++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts index 375129b62102..9ae65c767c90 100644 --- a/arch/arm/boot/dts/rk3188-px3-evb.dts +++ b/arch/arm/boot/dts/rk3188-px3-evb.dts @@ -44,7 +44,19 @@ }; &cpu0 { - cpu0-supply = <&vdd_cpu>; + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; }; &emmc { diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 0e5e4cf3d84c..9175b58c244a 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -153,7 +153,19 @@ }; &cpu0 { - cpu0-supply = <&vdd_arm>; + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; }; &gpu { -- 2.18.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet [not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> ` (4 preceding siblings ...) 2018-11-13 13:05 ` [PATCH 5/6] ARM: dts: rockchip: update cpu supplies on rk3188 Heiko Stuebner @ 2018-11-27 14:14 ` Heiko Stuebner 5 siblings, 0 replies; 10+ messages in thread From: Heiko Stuebner @ 2018-11-27 14:14 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8 Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Am Dienstag, 13. November 2018, 14:05:53 CET schrieb Heiko Stuebner: > Add a devicetree for the BQ Edison2 tablet from MundoReader. > Incidentially this is the device I wanted to run mainline Linux > on when starting the Rockchip port - thinking, "this can't take > thaaat long" ;-) - so I've come somewhat full-circle now. > > With Lima it can also use gpu acceleration for gles2. > > Notable absent peripherals are the touchscreen (ft5606), > IT66121 hdmi bridge (internal panel is working nicely) and sound. > All areas I'm still trying to get working. > > The series includes some smallish cleanups before the board > with cleaning up the cpu-core nodes being a big part. > > And there are a number of driver-side additions pending that > should get accepted before the board itself can go in. > (bq24196, Innolux panel, tmp108-interrupt). > > > Heiko Stuebner (6): > ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s > ARM: dts: rockchip: convert rk3188 to opp-v2 > ARM: dts: rockchip: add cpu-core resets for rk3188 > ARM: dts: rockchip: add phandles to secondary cpu cores > ARM: dts: rockchip: update cpu supplies on rk3188 applied the general cleanups from patch 1-5 for 4.21 now. > ARM: dts: rockchip: add BQ Edison 2 QC devicetree this one gets a bit more time for possible dt-maintainer Review of the small binding addition. ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-12-06 13:20 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2018-11-13 13:05 [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner
2018-11-13 13:05 ` [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree Heiko Stuebner
[not found] ` <20181113130559.31221-7-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-12-04 20:21 ` Rob Herring
2018-12-06 13:20 ` Heiko Stuebner
[not found] ` <20181113130559.31221-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-11-13 13:05 ` [PATCH 1/6] ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s Heiko Stuebner
2018-11-13 13:05 ` [PATCH 2/6] ARM: dts: rockchip: convert rk3188 to opp-v2 Heiko Stuebner
2018-11-13 13:05 ` [PATCH 3/6] ARM: dts: rockchip: add cpu-core resets for rk3188 Heiko Stuebner
2018-11-13 13:05 ` [PATCH 4/6] ARM: dts: rockchip: add phandles to secondary cpu cores Heiko Stuebner
2018-11-13 13:05 ` [PATCH 5/6] ARM: dts: rockchip: update cpu supplies on rk3188 Heiko Stuebner
2018-11-27 14:14 ` [PATCH 0/6] ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet Heiko Stuebner
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