From mboxrd@z Thu Jan 1 00:00:00 1970 From: Evan Green Subject: [PATCH v2 2/3] arm64: dts: qcom: sdm845: Add SD node Date: Thu, 6 Dec 2018 10:45:21 -0800 Message-ID: <20181206184522.118062-3-evgreen@chromium.org> References: <20181206184522.118062-1-evgreen@chromium.org> Return-path: In-Reply-To: <20181206184522.118062-1-evgreen@chromium.org> Sender: linux-kernel-owner@vger.kernel.org To: Andy Gross , Rob Herring , Bjorn Andersson Cc: Douglas Anderson , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, David Brown , Mark Rutland List-Id: devicetree@vger.kernel.org Add one of the two SD controllers to SDM845. Signed-off-by: Evan Green Reviewed-by: Douglas Anderson --- Changes in v2: - Reworded commit message to note that there are multiple SD controllers. arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1419b0098cb38..bb8eacdf40910 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1078,6 +1078,21 @@ }; }; + sdhc_2: sdhci@8804000 { + compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x8804000 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>; + clock-names = "iface", "core"; + + status = "disabled"; + }; + usb_1_hsphy: phy@88e2000 { compatible = "qcom,sdm845-qusb2-phy"; reg = <0x88e2000 0x400>; -- 2.18.1