devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>,
	Jason Cooper <jason@lakedaemon.net>,
	Nadav Haklai <nadavh@marvell.com>,
	devicetree@vger.kernel.org,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Will Deacon <will.deacon@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Eduardo Valentin <edubezval@gmail.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	David Sniatkiwicz <davidsn@marvell.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-pm@vger.kernel.org, Zhang Rui <rui.zhang@intel.com>,
	linux-arm-kernel@lists.infradead.org,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH v3 3/6] dt-bindings: ap806: document the thermal interrupt capabilities
Date: Mon, 10 Dec 2018 17:03:54 -0600	[thread overview]
Message-ID: <20181210230354.GA1503@bogus> (raw)
In-Reply-To: <20181204190332.10351-4-miquel.raynal@bootlin.com>

On Tue, Dec 04, 2018 at 08:03:29PM +0100, Miquel Raynal wrote:
> The thermal IP can produce interrupts on overheat situation.
> Describe them.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  .../bindings/arm/marvell/ap806-system-controller.txt      | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
> index 3fd21bb7cb37..35e8dd2edfd2 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
> +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
> @@ -114,12 +114,18 @@ Documentation/devicetree/bindings/thermal/thermal.txt
>  The thermal IP can probe the temperature all around the processor. It
>  may feature several channels, each of them wired to one sensor.
>  
> +It is possible to setup an overheat interrupt by giving at least one
> +critical point to any subnode of the thermal-zone node.
> +
>  Required properties:
>  - compatible: must be one of:
>    * marvell,armada-ap806-thermal
>  - reg: register range associated with the thermal functions.
>  
>  Optional properties:
> +- interrupt-parent/interrupts: overheat interrupt handle. Should point to
> +  line 18 of the SEI irqchip.
> +  See interrupt-controller/interrupts.txt

Don't document interrupt-parent as it is implied and may be in a parent 
node.

>  - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer
>    to this IP and represents the channel ID. There is one sensor per
>    channel. O refers to the thermal IP internal channel, while positive
> @@ -133,6 +139,8 @@ ap_syscon1: system-controller@6f8000 {
>  	ap_thermal: thermal-sensor@80 {
>  		compatible = "marvell,armada-ap806-thermal";
>  		reg = <0x80 0x10>;
> +		interrupt-parent = <&sei>;
> +		interrupts = <18>;
>  		#thermal-sensor-cells = <1>;
>  	};
>  };
> -- 
> 2.19.1
> 

  reply	other threads:[~2018-12-10 23:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04 19:03 [PATCH v3 0/6] Add hw overheat IRQ support to Marvell thermal driver Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 1/6] thermal: armada: add overheat interrupt support Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 2/6] MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Miquel Raynal
2018-12-10 23:03   ` Rob Herring [this message]
2018-12-12  9:32     ` Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 4/6] dt-bindings: cp110: " Miquel Raynal
2018-12-10 23:05   ` Rob Herring
2018-12-04 19:03 ` [PATCH v3 5/6] arm64: dts: marvell: add interrupt support to ap806 thermal node Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 6/6] arm64: dts: marvell: add interrupt support to cp110 " Miquel Raynal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181210230354.GA1503@bogus \
    --to=robh@kernel.org \
    --cc=andrew@lunn.ch \
    --cc=antoine.tenart@bootlin.com \
    --cc=catalin.marinas@arm.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=davidsn@marvell.com \
    --cc=devicetree@vger.kernel.org \
    --cc=edubezval@gmail.com \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=maxime.chevallier@bootlin.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=nadavh@marvell.com \
    --cc=rui.zhang@intel.com \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).