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From: Thierry Reding <thierry.reding@gmail.com>
To: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [RFC v2] pwm: Add Xilinx AXI Timer in PWM mode support
Date: Wed, 12 Dec 2018 11:42:41 +0100	[thread overview]
Message-ID: <20181212104241.GA17654@ulmo> (raw)
In-Reply-To: <20180322135316.19685-1-alvaro.gamez@hazent.com>

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On Thu, Mar 22, 2018 at 02:53:16PM +0100, Alvaro Gamez Machado wrote:
> This patch adds support for the IP core provided by Xilinx.
> This IP core can function as a two independent timers, but also use both
> counters as values for period and duty cycle of a PWM output.
> 
> There can be many instances of this IP in a design, but the first one of
> them will be used to generate system's clock. If we were to use this driver
> against the first timer instance found on the DT, we would expose it as a
> PWM controller, and reconfiguring it will break the clock.
> 
> To avoid this we add an attribute pwm-outputs to this device declaration.
> This new driver will fail to probe when pwm-outputs is different than 1.
> 
> We could use a boolean, but future versions of this IP core could implement
> several PWM and counters, so when (if) this happens, we would only have to
> adjust the pwm-outputs comparison to allow more than one PWM devices.
> 
> Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
> ---
> 
> This is the second proposal on getting AXI Timer PWM capability into Linux. 
> The other alternative, which was sent un June past year, didn't look for
> pwm-output attribute, so in order not to kidnap control from
> arch/microblaze/kernel/timer.c it used a different compatible string. That's
> not wrong per se, but raises the question: can one piece of hardware have
> two compatible strings depending on its intended use, rather than on the
> nature of the hardware itself?
> 
> If there's interest in mainlining this or the proposal I sent last year, I'd
> be grateful to hear from the devicetree maintainers and maybe approve or
> suggest any different aproach.
> 
> Best regards
> 
>  drivers/pwm/Kconfig         |   9 ++
>  drivers/pwm/Makefile        |   1 +
>  drivers/pwm/pwm-axi-timer.c | 204 ++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 214 insertions(+)
>  create mode 100644 drivers/pwm/pwm-axi-timer.c

Did any discussion regarding the above-mentioned issues ever ensue? How
do you want to proceed? At the very least we'll need some sort of device
tree binding for this driver, so perhaps start with a DT binding
proposal and take it from there?

Thierry

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  reply	other threads:[~2018-12-12 10:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-22 13:53 [RFC v2] pwm: Add Xilinx AXI Timer in PWM mode support Alvaro Gamez Machado
2018-12-12 10:42 ` Thierry Reding [this message]
2018-12-12 15:06   ` Alvaro Gamez Machado

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