From mboxrd@z Thu Jan 1 00:00:00 1970 From: Weiyi Lu Subject: [resend PATCH v1 0/2] update Mediatek MT2712 clock Date: Fri, 14 Dec 2018 10:04:15 +0800 Message-ID: <20181214020417.2871-2-weiyi.lu@mediatek.com> References: <20181214020417.2871-1-weiyi.lu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20181214020417.2871-1-weiyi.lu@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Matthias Brugger , Stephen Boyd , Rob Herring Cc: James Liao , Fan Chen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, srv_heupstream@mediatek.com, Weiyi Lu List-Id: devicetree@vger.kernel.org This series is based on v4.20-rc1. Basically, this series is for the 3rd ECO design change of MT2712. Weiyi Lu (2): dt-bindings: clock: add clock for MT2712 clk: mediatek: update clock driver of MT2712 drivers/clk/mediatek/clk-mt2712.c | 8 ++++++-- include/dt-bindings/clock/mt2712-clk.h | 3 ++- 2 files changed, 8 insertions(+), 3 deletions(-) -- 2.18.0