From: Joseph Lo <josephl@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Joseph Lo <josephl@nvidia.com>
Subject: [PATCH V3 02/20] dt-bindings: clock: tegra124-dfll: add Tegra210 support
Date: Tue, 18 Dec 2018 17:12:14 +0800 [thread overview]
Message-ID: <20181218091232.23532-3-josephl@nvidia.com> (raw)
In-Reply-To: <20181218091232.23532-1-josephl@nvidia.com>
Add Tegra210 support for DFLL clock.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
---
*V3:
- no change
*V2:
- add ack tag
---
.../devicetree/bindings/clock/nvidia,tegra124-dfll.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
index 38e8cc8c70a8..8a38c8e78acf 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
@@ -10,7 +10,9 @@ control module that will automatically adjust the VDD_CPU voltage by
communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
Required properties:
-- compatible : should be "nvidia,tegra124-dfll"
+- compatible : should be one of:
+ - "nvidia,tegra124-dfll": for Tegra124
+ - "nvidia,tegra210-dfll": for Tegra210
- reg : Defines the following set of registers, in the order listed:
- registers for the DFLL control logic.
- registers for the I2C output logic.
--
2.20.1
next prev parent reply other threads:[~2018-12-18 9:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181218091232.23532-1-josephl@nvidia.com>
2018-12-18 9:12 ` [PATCH V3 01/20] dt-bindings: clock: tegra124-dfll: Update DFLL binding for PWM regulator Joseph Lo
2018-12-18 9:56 ` Jon Hunter
2018-12-18 15:19 ` Rob Herring
2018-12-19 7:04 ` Joseph Lo
2018-12-18 9:12 ` Joseph Lo [this message]
2018-12-18 15:44 ` [PATCH V3 02/20] dt-bindings: clock: tegra124-dfll: add Tegra210 support Rob Herring
2018-12-18 18:02 ` Stephen Boyd
2018-12-18 9:12 ` [PATCH V3 03/20] dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties Joseph Lo
2018-12-18 15:45 ` Rob Herring
2018-12-18 9:12 ` [PATCH V3 04/20] dt-bindings: cpufreq: tegra124: remove cpu_lp clock " Joseph Lo
2018-12-18 15:47 ` Rob Herring
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