From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Subject: [PATCH v4 3/6] media: sun6i: Update default CSI_SCLK for A64 Date: Tue, 18 Dec 2018 17:03:17 +0530 Message-ID: <20181218113320.4856-4-jagan@amarulasolutions.com> References: <20181218113320.4856-1-jagan@amarulasolutions.com> Reply-To: jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20181218113320.4856-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Yong Deng , Mauro Carvalho Chehab , Maxime Ripard , Rob Herring , Mark Rutland , Chen-Yu Tsai , linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi , linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Michael Trimarchi Cc: Jagan Teki List-Id: devicetree@vger.kernel.org Unfortunately A64 CSI cannot work with default CSI_SCLK rate. A64 BSP is using 300MHz clock rate as default csi clock, so sun6i_csi require explicit change to update CSI_SCLK rate to 300MHZ for A64 SoC's. So, set the clk_mod to 300MHz only for A64. Signed-off-by: Jagan Teki --- drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c index 9ff61896e4bb..91470edf7581 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c @@ -822,6 +822,11 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev, return PTR_ERR(sdev->clk_mod); } + /* A64 require 300MHz mod clock to operate properly */ + if (of_device_is_compatible(pdev->dev.of_node, + "allwinner,sun50i-a64-csi")) + clk_set_rate_exclusive(sdev->clk_mod, 300000000); + sdev->clk_ram = devm_clk_get(&pdev->dev, "ram"); if (IS_ERR(sdev->clk_ram)) { dev_err(&pdev->dev, "Unable to acquire dram-csi clock\n"); -- 2.18.0.321.gffc6fa0e3