From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jack Pham Subject: Re: [PATCH v5 2/2] phy: qualcomm: Add Synopsys High-Speed USB PHY driver Date: Wed, 19 Dec 2018 12:01:07 -0800 Message-ID: <20181219200107.GD1997@jackp-linux.qualcomm.com> References: <20181127100722.9993-1-shawn.guo@linaro.org> <20181127100722.9993-3-shawn.guo@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20181127100722.9993-3-shawn.guo@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: Shawn Guo Cc: Kishon Vijay Abraham I , Rob Herring , Sriharsha Allenki , Anu Ramanathan , Bjorn Andersson , Vinod Koul , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Hi Shawn, On Tue, Nov 27, 2018 at 06:07:22PM +0800, Shawn Guo wrote: > It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which > is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs. > > Signed-off-by: Shawn Guo > --- > drivers/phy/qualcomm/Kconfig | 10 + > drivers/phy/qualcomm/Makefile | 1 + > .../phy/qualcomm/phy-qcom-usb-hs-snsp-28nm.c | 529 ++++++++++++++++++ Just caught this... s/snsp/snps/ in the file name? The bindings doc in Patch 1 is named correctly. Thanks, Jack -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project